Age of Loop Information with Flexible Transmission Enabled Communication and Control Co-Design in Industrial IoT

Precise and low-latency information transmission through communication systems is essential in the Industrial Internet of Things(IIoT).However,in an industrial system,there is always a coupling relationship between the control and communication components.To improve the system's overall performance,exploring the co-design of communication and control systems is crucial.In this work,we propose a new metric±Age of Loop Information with Flexible Transmission(AoLI-FT),which dynamically adjusts the maximum number of uplink(UL)and downlink(DL)transmission rounds,thus enhancing reliability while ensuring timeliness.Our goal is to explore the relationship between AoLI-FT,reliability,and control convergence rate,and to design optimal blocklengths for UL and DL that achieve the desired control convergence rate.To address this issue,we first derive a closed-form expression for the upper bound of AoLI-FT.Subsequently,we establish a relationship between communication reliability and control convergence rates using a Lyapunov-like function.Finally,we introduce an iterative alternating algorithm to determine the optimal communication and control parameters.The numerical results demonstrate the significant performance advantages of our proposed communication and control co-design strategy in terms of latency and control cost.

Co-Design of Monolithically Integrated Photo-Detector and Optical-Receiver

A behavioral model of the photodiode is presented.The model describes the relationship between photocurrent and incident optical power,and it also illustrates the impact of the reverse bias to the variation of the junction capacitance.According to this model,the photodiode and a CMOS receiver circuit are simulated and designed simultaneously under a universal circuit simulation environment.

Co-design for an SoC embedded network controller

With the development of Ethernet systems and the growing capacity of modem silicon technology, embedded communication networks are playing an increasingly important role in embedded and safety critical systems. Hardware/software co-design is a methodology for solving design problems in processor based embedded systems. In this work, we implemented a new 1-cycle pipeline microprocessor and a fast Ethemet transceiver and established a low cost, high performance embedded network controller, and designed a TCP/IP stack to access the Intemet. We discussed the hardware/software architecture in the forepart, and then the whole system-on-a-chip on Altera Stratix EP1S25F780C6 device. Using the FPGA environment and SmartBit tester, we tested the system＇s throughput. Our simulation results showed that the maximum throughput of Ethemet packets is up to 7 Mbps, that of UDP packets is up to 5.8 Mbps, and that of TCP packets is up to 3.4 Mbps, which showed that this embedded system can easily transmit basic voice and video signals through Ethemet, and that using only one chip can realize that many electronic devices access to the Intemet directly and get high performance.

Event-triggered sampling and fault-tolerant control co-design based on fault diagnosis observer

A co-design scheme of event-triggered sampling mechanism and active fault tolerant control(FTC) is developed. Firstly,a fault diagnosis observer is designed to estimate both the fault and the state simultaneously by using the event-triggered sampled output. Some H∞constraints between the estimation errors and the event-triggered sampling mechanism are established to ensure the estimation accuracy. Then, based on the constraints and the obtained fault information, an event-triggered detector and a static fault tolerant controller are co-designed to guarantee the stability of the faulty system and to reduce the sensor communication cost.Furthermore, the problem of the event detector and dynamic FTC co-design is also investigated. Simulation results of an unstable batch reactor are finally provided to illustrate the effectiveness of the proposed method.

An Internet-enabled Integration of Concurrent Engineering with Co-design

In this paper,the Web-based integration methodology and framework have been developed to facilitate collabora- tive and concurrent engineering design in distributed manufacturing environments.The distributed concurrent engineering and co- design are discussed as key components in the mechanism.The related integration system is presented,which includes four function- al modules:co-design,Web-based visualization,manufacturing analysis and look-up service.It can be used for a design team geo- graphically distributed to organize a collaborative and concurrent engineering design effectively.In particular,the collaborative mechanism incorporated with Java-based and Internet-enabled technologies can generate extended strategies for design and planning. Thus,the proposed integration architecture enables the system to be generic,open and scalable.Finally,for the trend of global manufacturing,a case study of Internet-enabled collaborative optimization is introduced and a discussion on teamwork capability is made.

Broadband Sequential Load-Modulated Balanced Amplifier Using Coupler-PA Co-Design Approach

The basic theory of the sequential load-modulated balanced amplifier(SLMBA)is introduced and the working principle of its active load modulation is analyzed in this paper.In order to further improve the performance of the SLMBA,a codesigned method of the coupler and power amplifier(PA)is proposed,which is different from the traditional design of couplers.According to the back-off point and saturation point of the SLMBA,this coupler-PA codesign approach can make the working state of the coupler and three-way PA closer to the actual situation,which improves the overall performance of the SLMBA.The maximum output power ratio of the control PA and the balance PA is then determined by the preset output power back-off(OBO)of 10 dB,and the phase compensation line is determined by the trace of the load modulation impedance of the balanced PA.In order to verify the proposed method,an SLMBA operating at 1.5–2.7 GHz(57%relative bandwidth)is designed.The layout simulation results show that its saturated output powers achieve 40.7–43.7 dBm and the small signal gains are 9.7–12.4 dB.Besides,the drain efficiencies at the saturated point and 10 dB OBO point are 52.7%–73.7%and 44.9%–59.2%respectively.

Inclusive Architecture:Digital Technologies,Co-design and Qualification of the Project Process

This article presents the scenario of programming use by architects and engineers,creating their own unique tools.The goal is to emulate and understand the phenomenon of Building Information Modeling(BIM)software customization by developing plug-ins that can explore the human-environment relationship.Demonstrate the process for building a plugin that seeks to equalize the theory of accessibility technical standards,visually impaired and architects.Use Design Science Research methodologies to guide the construction of artifacts for specific practical problems and the Collaborative Design/Co-design to understand and know the users’expertise.It is argued that the low quality of projects that include elements for the orientation of the visually impaired in Brazil is often related to an unstructured methodology in which important aspects such as the real needs of this group and the human-environment relationship are neglected.

Kinetic Energy Harvesting Toward Battery-Free IoT:Fundamentals,Co-Design Necessity and Prospects

Energy harvesting(EH)technology is developed with the purpose of harnessing ambient energy in different physical forms.Although the available ambient energy is usually tiny,not comparable to the centralized power generation,it brings out the convenience of onsite power generation by drawing energy from local sources,which meets the emerging pow⁃er demand of long-lasting,extensively-deployed,and maintenance-free Internet of Things(IoT).Kinetic energy harvesting(KEH)is one of the most promising EH solutions toward the realization of battery-free IoT.The KEH-based battery-free IoT can be extensively deployed in the smart home,smart building,and smart city scenarios,enabling perceptivity,intelli⁃gence,and connectivity in many infrastructures.This paper gives a brief introduction to the configurations and basic principles of practical KEH-IoT systems,including their mechani⁃cal,electrical,and computing parts.Although there are already a few commercial products in some specific application markets,the understanding and practice in the co-design and optimization of a single KEH-IoT device are far from mature,let alone the conceived multia⁃gent energy-autonomous intelligent systems.Future research and development of the KEHIoT system beckons for more exchange and collaboration among mechanical,electrical,and computer engineers toward general design guidelines to cope with these interdisciplinary en⁃gineering problems.

Co-design in Public Spaces for Children:The Design Process of a Pocket Park

The active participation of users in the Design Process(DP)in architecture is a collective action,which aims to meet their real needs.In terms of open spaces for children,squares and playgrounds become leisure spaces known for being places of coexistence,interaction and entertainment.However,the vast majority of children’s environments are planned and organized considering the perceptions and experiences of adults.Children become absent from the process of building the contemporary city.Co-design is an important tool for adding users to DP.The objective of this work is,therefore,to include children in the DP of a Pocket Park,using methods and tools to support co-design.The work was structured based on bibliographic review,Focus Group,Culture Maker and Digital Fabrication.The research indicated that the collaborative project promotes assertive communication between children and designers,welcoming their ideas and perceptions in a flexible way.

Co-Design and Trust in Social Network’s Websites

This research is focused on internet shoppers co-design, individual tendency of trust, trust belief, and purchase intention. An online questionnaire was set out in survey form on Google Docs in or-der to collect data. The survey was conducted of participants in Mongolia. 236 usable responses were obtained from Mongolian potential customers in order to examine constructs. The findings suggest that co-design and individual tendency of trust have significant positive effect on the trust levels throughout intention to purchase.

An FPGA-Based HOG Accelerator with HW/SW Co-Design for Human Detection and Its Application to Crowd Density Estimation

Human detection is important in many applications and has attracted significant attention over the last decade. The Histograms of Oriented Gradients (HOG) as effective local descriptors are used with binary sliding window mechanism to achieve good detection performance. However, the computation of HOG under such framework is about billion times and the pure software implementation for HOG computation is hard to meet the real-time requirement. This study proposes a hardware architecture called One-HOG accelerator operated on FPGA of Xilinx Spartan-6 LX-150T that provides an efficient way to compute HOG such that an embedded real-time platform of HW/SW co-design for application to crowd estimation and analysis is achieved. The One-HOG accelerator mainly consists of gradient module and histogram module. The gradient module is for computing gradient magnitude and orientation;histogram module is for generating a 36-D HOG feature vector. In addition to hardware realization, a new method called Histograms-of-Oriented-Gradients AdaBoost Long-Feature-Vector (HOG-AdaBoost-LFV) human classifier is proposed to significantly decrease the number of times to compute the HOG without sacrificing detection performance. The experiment results from three static image and four video datasets demonstrate that the proposed SW/HW (software/hardware) co-design system is 13.14 times faster than the pure software computation of Dalal algorithm.

Routing and scheduling co-design for holistic software-defined deterministic network

As a result of the growing complexity of industrial Internet applications,traditional hardware-based network designs are encountering challenges in terms of programmability and dynamic adaptability as they struggle to meet the real-time,high-reliability transmission requirements for the vast quantities of data generated in industrial environments.This paper proposes a holistic software-defined deterministic network(HSDDN)design solution.This solution uses a centralized controller to implement a comprehensive software definition,ranging from the network layer down to the physical layer.Within the wireless access domain,we decouple the standard radio-frequency modules from baseband processing to realize a software-defined physical layer,which then allows us to adjust the data transmission cycles and tag the trigger rates to meet demand for low-power,high-concurrency transmission.Within the wired network domain,we integrate software-defined networking with time-sensitive networking and propose a coordinated design strategy to address routing and the deterministic scheduling problem.We define a set of constraints to ensure collaborative transmission of the periodic and aperiodic data flows.To guarantee load balancing across all paths and timeslots,we introduce the Jain’s fairness index as the optimization objective and then construct a nondeterministic polynomial-time(NP)-hard joint optimization problem.Furthermore,an algorithm called Tabu search for routing and scheduling with dual-stages(TSRS-DS)is proposed.Simulation experiments demonstrate the effectiveness of the proposed HSDDN architecture.

Research on railway BIM platform framework based on homemade graphics engine

At present,BIM platforms rely on foreign software.Homemade software and industry applications are mostly secondary developments,which present stranglehold problems caused by interruptions to the software supply.To solve the problem,key technical research on the 3D integrated design of railway engineering was stuedied based on homemade graphics engines to propose an innovative railway BIM platform framework.The entire process was completed from the top-level design to the engineering verification of the platform.The co-designed mechanism of a"center model and link"hybrid mode was constructed,which solved the difficulties of data management and increment synchronization at a large scale,achieving teamwork among surveying and mapping,alignments,and bridges.The results of this study could provide strong support for the development of BIM software for a whole railway and all majors.

4×112 Gb/s hybrid integrated silicon receiver based on photonic-electronic co-design

A 4×112 Gb/s hybrid-integrated optical receiver is demonstrated based on the silicon-photonic vertical p-i-n photodetector and silicon–germanium transimpedance amplifier.We propose a photonic-electronic co-design technique to optimize both the device-level and system-level performance,based on the end-to-end equivalent circuit model of the receiver.Continuous-time linear equalization and shunt peaking are employed to enhance the frequency response.Experimental results reveal that the optical-to-electrical 3-dB bandwidth of the receiver is 48 GHz.Clear open NRZ eye diagrams at56 Gb/s and PAM-4 eye diagrams at 112 Gb/s are achieved without an equalizer in the oscilloscope.The measured bit error rates for 56 Gb/s in NRZ and 112 Gb/s in PAM-4 reach 1×10^(-12)and 2.4×10^(-4)(KP4-FEC:forward error correction)thresholds under-4 dBm input power,respectively.Furthermore,the proposed receiver boasts a power consumption of approximately2.2 pJ/bit,indicating an energy efficient solution for data center traffic growth.

Forming process chain for manufacturing complex conical-section profiled rings:On a co-design method

The final quality of complex conical-section rings depends on co-design of multiple processes in forming process chain.In this study,for a complex aeroengine casing ring with a large slope and a flange on its end,a co-design method of the forming process chain is put forward towards the objective of precision forming,which not only proposes a standard process route composed of multiple processes of upsetting,punching,rectangular ring rolling,loose tooling forging and profiled ring rolling,but also presents co-design methods of dies and blanks for all the processes.For profiled ring rolling,a design method of preformed blank that makes the blank and the target conical-section ring have the same axial volume distribution is proposed.By the method,the axial metal redistribution during the process can be alleviated greatly thus improving the forming stability and precision of the ring.Based on the geometric features of designed preformed blank,design methods of blanks and dies for loose tolling forging,rectangular ring rolling,punching and upsetting are proposed sequentially.In view of the key roles of loose tooling forging(manufacturing the preformed blank)and profiled ring rolling on the final quality of the conical ring parts,inherited FE simulations for these two processes are performed to verify the proposed design methods and determine appropriate design parameter.It is demonstrated that the proposed design method has significant advantages in improving forming precision.Besides,a suggestive value 1.5 of the rolling ratio for profiled ring rolling(a key design parameter)is given based on comprehensive consideration of multiple indicators such as ring roundness,deformation uniformity and forming load.The corresponding industrial experiments performed illustrate that a high forming precision of the conical-section aeroengine casing ring is achieved.

浅谈SoC设计中的软硬件协同设计技术

集成电路制造技术的迅速发展已经可以把一个完整的电子系统集成到一个芯片上即所谓的系统级芯片 (Sys tem on Chip ,简称SoC)。传统的设计方法是将硬件和软件分开来设计的 ,在硬件设计完成并生产出样片后才能调试软件。本文介绍了针对于系统级芯片设计的软硬件协同设计技术 (co design)的概念和设计流程 。

椭圆曲线点乘算法的软硬件协同设计研究

椭圆曲线密码体制是一种基于代数曲线的公开密码体制,其中曲线的点乘速度决定了该密码体制的速度。以NiosII为核心的SOPC技术的发展代表了半导体和嵌入式系统的发展方向。文章在NiosII处理器上对椭圆曲线点乘算法给予了实现,并给出与8051单片机环境实现的速度比较分析,最后使用软硬件协同设计的方式进一步提高椭圆曲线点乘速度。

Formation-Containment Control Using Dynamic Event-Triggering Mechanism for Multi-Agent Systems

The paper proposes a novel approach for formationcontainment control based on a dynamic event-triggering mechanism for multi-agent systems.The leader-leader and follower-follower communications are reduced by utilizing the distributed dynamic event-triggered framework.We consider two separate sets of design parameters:one set comprising control and dynamic event-triggering parameters for the leaders and a second set similar to the first one with different values for the followers.The proposed algorithm includes two novel stages of codesign optimization to simultaneously compute the two sets of parameters.The design optimizations are convex and use the weighted sum approach to enable a structured trade-off between the formation-containment convergence rate and associated communications.Simulations based on non-holonomic mobile robot multi-agent systems quantify the effectiveness of the proposed approach.

A Novel Attribute-Based Encryption Approach with Integrity Verification for CAD Assembly Models

Cloud manufacturing is one of the three key technologies that enable intelligent manufacturing.This paper presents a novel attribute-based encryption(ABE)approach for computer-aided design(CAD)assembly models to effectively support hierarchical access control,integrity verification,and deformation protection for co-design scenarios in cloud manufacturing.An assembly hierarchy access tree(AHAT)is designed as the hierarchical access structure.Attribute-related ciphertext elements,which are contained in an assembly ciphertext(ACT)file,are adapted for content keys decryption instead of CAD component files.We modify the original Merkle tree(MT)and reconstruct an assembly MT.The proposed ABE framework has the ability to combine the deformation protection method with a content privacy of CAD models.The proposed encryption scheme is demonstrated to be secure under the standard assumption.Experimental simulation on typical CAD assembly models demonstrates that the proposed approach is feasible in applications.

Efficient Hardware/Software Implementation of LPC Algorithm in Speech Coding Applications

The LPC “Linear Predictive Coding” algorithm is a widely used technique for voice coder. In this paper we present different implementations of the LPC algorithm used in the majority of voice decoding standard. The windowing/autocorrelation bloc is implemented by three different versions on an FPGA Spartan 3. Allowing the possibility to integrate a Microblaze processor core a first solution consists of a pure software implementation of the LPC using this core RISC processor. Second solution is a pure hardware architecture implemented using VHDL based methodology starting from description until integration. Finally, the autocorrelation core is then proposed to be implemented using hardware/software (HW/SW) architecture with the existing processor. Each architecture performances are compared for different data lengths.