Capacitorless Solid-state Power Filter for Single-phase DC-AC Converters

Converters rely on passive filtering as a crucial element due to the high-frequency operational characteristics of power electronics.Traditional filtering methods involve a dual inductor-capacitor(LC)cell or an inductor-capacitor-inductor(LCL)T-circuit.However,capacitors are susceptible to wear-out mechanisms and failure modes.Nevertheless,the necessity for monitoring and regular replacement adds to an elevated cost of ownership for such systems.The utilization of an active output power filter can be used to diminish the dimensions of the LC filter and the electrolytic dc-link capacitor,even though the inclusion of capacitors remains an indispensable part of the system.This paper introduces capacitorless solid-state power filter(SSPF)for single-phase dc-ac converters.The proposed configuration is capable of generating a sinusoidal ac voltage without relying on capacitors.The proposed filter,composed of a planar transformer and an H-bridge converter operating at high frequency,injects voltage harmonics to attain a sinusoidal output voltage.The design parameters of the planar transformer are incorporated,and the impact of magnetizing and leakage inductances on the operation of the SSPF is illustrated.Theoretical analysis,supported by simulation and experimental results,are provided for a design example for a single-phase system.The total harmonic distortion observed in the output voltage is well below the IEEE 519 standard.The system operation is experimentally tested under both steady-state and dynamic conditions.A comparison with existing technology is presented,demonstrating that the proposed topology reduces the passive components used for filtering.

Broadband Dual-Input Doherty Power Amplifier Design Based on a Simple Adaptive Power Dividing Ratio Function

In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency points can be characterized by a polynomial.And in the practical test,the coefficients of SSF can be determined by measuring a small number of data points of input power.Same as other dualinput DPAs,the proposed approach can also achieve high output power and back-off efficiency in a broadband operation band by adjusting the power distribution ratio flexibly.Finally,a 1.5-2.5 GHz highefficiency dual-input Doherty power amplifier is implemented according to this approach.The test results show that the peak power is 48.6-49.7d Bm,and the 6-d B back-off efficiency is 51.0-67.0%,and the saturation efficiency is 52.4-74.6%.The digital predistortion correction is carried out at the frequency points of 1.8/2.1GHz,and the adjacent channel power ratio is lower than-54.5d Bc.Simulation and experiment results can verify the effectiveness and correctness of the proposed method.

A Hybrid Integrated and Low-Cost Multi-Chip Broadband Doherty Power Amplifier Module for 5G Massive MIMO Application

In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabricated using the gallium arsenide(GaAs)integrated passive device(IPD)process,is proposed for 5G massive multiple-input multiple-output(MIMO)application.An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance,and a single-driver architecture is adopted for a chip with high gain and small area.The proposed DPA has a bandwidth of 4.4-5.0 GHz that can achieve a saturation of more than 45.0 dBm.The gain compression from 37 dBm to saturation power is less than 4 dB,and the average power-added efficiency(PAE)is 36.3%with an 8.5 dB peak-to-average power ratio(PAPR)in 4.5-5.0 GHz.The measured adjacent channel power ratio(ACPR)is better than50 dBc after digital predistortion(DPD),exhibiting satisfactory linearity.

5G Wideband Bandpass Filtering Power Amplifiers Based on a Bandwidth-Extended Bandpass Matching Network

In this paper,a 5G wideband power amplifier(PA)with bandpass filtering response is synthesized using a bandwidth-extended bandpass filter as the matching network(MN).In this structure,the bandwidth(θ_(C))is defined as a variable in the closedform equations provided by the microstrip bandpass filter.It can be extended over a wide range only by changing the characteristic impedances of the structure.Different from the other wideband MNs,the extension of bandwidth does not increase the complexity of the structure(order n is fixed).In addition,based on the bandwidth-extended structure,the wideband design of bandpass filtering PA is not limited to the fixed bandwidth of the specific filter structure.The theoretical analysis of the MN and the design flow of the PA are provided in this design.The fabricated bandpass filtering PA can support almost one-octave bandwidth(2-3.8 GHz),covering the two 5G bands(n41 and n78).The drain efficiency of 47%-60%and output power higher than 40 dBm are measured.Good frequency selectivity in S-parameter measurements can be observed.

Research Towards Terahertz Power Amplifiers in Silicon-Based Process

In view of the existing design challenges for Terahertz(THz)power amplifiers(PAs),the common design methods and the efforts of the State Key Laboratory of Millimeter Wave,Southeast University,China in the development of silicon-based THz PAs,mainly including silicon-based PAs with operating frequencies covering 100–300 GHz,are summarized in this paper.Particularly,we design an LC-balun-based two-stage differential cascode PA with a center frequency of 150 GHz and an output power of 14 dBm.Based on a Marchand balun,we report a 220 GHz three-stage differential cascode PA with a saturated output power of 9.5 dBm.To further increase the output power of THz PA,based on a four-way differential power combining technique,we report a 211–263 GHz dual-LC-tank-based broadband PA with a recorded 14.7 dBm Psat and 16.4 dB peak gain.All the above circuits are designed in a standard 130 nm silicon germanium(SiGe)BiCMOS process.

New thermal optimization scheme of power module in solid-state amplifier

The new 1 kW power module for ADS project needs the optimization of cooling design including water flow and tunnel layout, and the water flow of three tons per hour was chosen to be a goal for a 20 kW power source.According to analysis from the insertion and integrated loss, about 24 modules were integrated into the rated power. Thus, every module has a cooling flow of 2.1 L/min for RF heat load and power supply loss, which is very hard to achieve if no special consideration and techniques. A new thermal simulation method was introduced for thermal analysis of cooling plate through CST multi-physics suite,especially for temperature of power LDMOS transistor.Some specific measures carried out for the higher heat transfer were also presented in this paper.

An S-band solid-state radio frequency power amplifier used at Shanghai soft X-ray FEL facility

In this paper,we present the general design methods and parameter measurements of a 1-k W solidstate radio frequency(RF) power amplifier at 2856 MHz,for the soft X-ray free electron laser facility.Three-stage amplification with a 4-way combination is used.An RF switch module is integrated with the solid-state RF power amplifier to convert the continuous wave(CW) signal into pulse signal,with adjustable pulse width.The power gain is measured at 57.7 d B at 60 d Bm output.The RF phase noise,which is measured by the low-level RF system,is\0.015 degree(RMS),while the pulse frontier jitter is\5 ns.

Step memory polynomial predistorter for power amplifiers with memory

To reduce the number of digital predistortion coefficients, a step memory polynomial （SMP）predistorter is presented. The number of predistortion coefficients is decreased by adjusting the maximum nonlinear order for different memory orders in the traditional memory polynomial （MP）predistorter. The proposed SNIP predistorter is identified by an offline learning structure on which the coefficients can be extracted directly from the sampled input and output of a PA. Simulation results show that the SMP predistorter is not tied to a particular PA model and is, therefore, robust. The effectiveness of the SMP predistorter is demonstrated by simulations and experiments on an MP model, a parallel Wiener model, a Wiener-Hammerstein model, a sparsedelay memory polynomial model and a real PA which is fabricated based on the Freescale LDMOSFET MRF21030. Compared with the traditional MP predistorter, the SMP predistorter can reduce the number of coefficients by 60%.

Behavioral modeling of RF power amplifiers with time-delay feed-forward neural networks

A novel behavioral model using three-layer time-delay feed-forward neural networks （TDFFNN）is adopted to model radio frequency （RF）power amplifiers exhibiting memory nonlinearities. In order to extract the parameters, the back- propagation algorithm is applied to train the proposed neural networks. The proposed model is verified by the typical odd- order-only memory polynomial model in simulation, and the performance is compared with different numbers of taped delay lines（TDLs） and perceptrons of the hidden layer. For validating the TDFFNN model by experiments, a digital test bench is set up to collect input and output data of power amplifiers at a 60 × 10^6 sample/s sampling rate. The 3.75 MHz 16-QAM signal generated in the vector signal generator（VSG） is chosen as the input signal, when measuring the dynamic AM/AM and AM/PM characteristics of power amplifiers. By comparisons and analyses, the presented model provides a good performance in convergence, accuracy and efficiency, which is approved by simulation results and experimental results in the time domain and frequency domain.

Nested Miller Active-Capacitor Frequency Compensation for Low-Power Three-Stage Amplifiers

A new frequency compensation technique for low-power, area-efficient multistage amplifiers is introduced. Using nested active capacitors, our scheme achieves better bandwidth-to-power and slew-rate-to-power performances than previous works. Implemented in standard 0.35μm CMOS technology, our three-stage amplifier achieves 105dB DC gain, 3.3M GBW,68 phase margin, and 2.56V/μs average slew rate under a 150pF capacitive load. All of these are realized with only 40μW power consumption under a 2V power supply,with very small compensation capacitors.

Adaptive Digital Predistortion Schemes to Linearize RF Power Amplifiers with Memory Effects

To compensate for nonlinear distortion introduced by RF power amplifiers （PAs） with memory effects, two correlated models, namely an extended memory polynomial （EMP） model and a memory lookup table （LUT） model, are proposed for predistorter design. Two adaptive digital predistortion （ADPD） schemes with indirect learning architecture are presented. One adopts the EMP model and the recursive least square （RLS） algorithm, and the other utilizes the memory LUT model and the least mean square （LMS） algorithm. Simulation results demonstrate that the EMP-based ADPD yields the best linearization performance in terms of suppressing spectral regrowth. It is also shown that the ADPD based on memory LUT makes optimum tradeoff between performance and computational complexity.

Design Technologies for Silicon-Based High-Efficiency RF Power Amplifiers:A Brief Overview

This paper presents a brief overview of several promising design technologies for high efficiency silicon-based radio frequency （RF） power amplifiers （PAs） as well as the use of these technologies in mobile broadband wireless communications. Four important aspects of PA design are addressed in this paper. First, we look at class-E PA design equations and provide an example of a class-E PA that achieves efficiency of 65-70% at 2.4 GHz. Then, we discuss state-of-the-art envelope tracking （ET） design for monolithic wideband RF mobile transmitter applications. A brief overview of Doherty PA design for the next-generation wireless handset applications is then given. Towards the end of the paper, we discuss an inherently broadband and highly efficient class-J PA design targeting future multi-band multi-standard wireless communication protocols.

Pruned Volterra Models with Memory Effects for Nonlinear Power Amplifiers

In this letter, a novel model is proposed for modeling the nonlinearity and memory effects of power amplifiers. The classical Volterra model is modified through a function of the sum of nonlinearity order with sum of memory length. The parameters of this model can be extracted in digital domain since the model is analyzed based on the envelope signals. The model we proposed enables a substantial reduction in the number of coefficients involved, and with excellent accuracy.

Adaptive Quasi-PID Control Method for Switching Power Amplifiers

Quasi-PID control method that is able to effectively inhibit the inherent tracking error of PI control method is proposed on the basis of a rounded theoretical analysis of a model of switching power amplifiers (SPAs). To avoid the harmful impacts of the circuit parameter variations and the random disturbances on quasi-PID control method, a single neuron is introduced to endow it with self-adaptability. Quasi-PID control method and the single neuron combine with each other perfectly, and their formation is named as single-neuron adaptive quasi-PID control method. Simulation and experimental results show that single-neuron adaptive quasi-PID control method can accurately track both the predictable and the unpredictable waveforms. Quantitative analysis demonstrates that the accuracy of single-neuron adaptive quasi-PID control method is comparable to that of linear power amplifiers (LPAs) and so can fulfill the requirements of some high-accuracy applications, such as protective relay test. Such accuracy is very difficult to be achieved by many modern control methods for converter controls. Compared with other modern control methods, the programming realization of single-neuron adaptive quasi-PID control method is more suitable for real-time applications and realization on low-end microprocessors for its simple structure and lower computational complexity.

Improved One-Cycle Control Algorithm in Five-Phase Six-Leg Switching Power Amplifiers for Magnetic Suspension Bearing

For the advantages of easy realization and rapidly intelligent response,the one-cycle control was applied in five-phase six-leg switching power amplifier for magnetic bearing.This paper improves the one-cycle control considering resistance voltage drop and derives its mathematical models.The improved algorithm is compared with the former one.The simulation and experimental results show that the improved algorithm can effectively reduce the output current ripple,achieve good tracking of the given current,improve the control accuracy,and verify the effectiveness and superiority of the method.

Wavelet network based predistortion method for wideband RF power amplifiers exhibiting memory effects

RF power amplifiers (PAs) are usually considered as memoryless devices in most existing predistortion techniques. Nevertheless, in wideband communication systems, PA memory effects can no longer be ignored and memoryless predistortion cannot linearize PAs effectively. After analyzing PA memory effects, a novel predistortion method based on wavelet networks (WNs) is proposed to linearize wideband RF power amplifiers. A complex wavelet network with tapped delay lines is applied to construct the predistorter and then a complex backpropagation algorithm is developed to train the predistorter parameters. The simulation results show that compared with the previously published feed-forward neural network predistortion method, the proposed method provides faster convergence rate and better performance in reducing out-of-band spectral regrowth.

An Envelope Hammerstein Model for Power Amplifiers

In this paper, an envelope Hammerstein （EH） model is introduced to describe dynamic input -output characteristics of RF power amplifiers. In the modeling approach, we use a new truncation method and an established nonlinear time series method to determine model structure. Then, we discuss the process of model parameter extraction in detailed. Finally, a 2 W WCDMA power amplifier is measured to verify the performance of EH model, and good agreement between model output and measurement result shows our model can accurately predict output characteristic of the power amplifier.

Robust Digital Predistortion for LTE/5G Power Amplifiers Utilizing Negative Feedback Iteration

A robust digital predistortion(DPD)technique utilizing negative feedback iteration is introduced for linearizing power amplifiers(PAs)in long term evolution(LTE)/5G systems.Different from the conventional direct learning and indirect learning structure,the proposed DPD suggests a two-step method to identify the predistortion.Firstly,a negative feedback based iteration is used to estimate the optimal DPD signal.Then the corresponding DPD parameters are extracted by forward modeling with the input signal and optimal DPD signal.The iteration can be applied to both single-band and dual-band PAs,which will achieve superior linear performance than the conventional direct learning DPD while having a relatively low computational complexity.The measurement is carried out on a broadband Doherty PA(DPA)with a 200 MHz bandwidth LTE signal at 2.1 GHz,and on a 5G DPA with two 10 MHz LTE signals at 3.4/3.6 GHz for validation in dual-band scenarios.

Volterra series based predistortion for broadband RF power amplifiers with memory effects

RF power amplifiers （PAs） are usually considered as memoryless devices in most existing predistortion techniques. However, in broadband communication systems, such as WCDMA, the PA memory effects are significant, and memoryless predistortion cannot linearize the PAs effectively. After analyzing the PA memory effects, a novel predistortion method based on the simplified Volterra series is proposed to linearize broadband RF PAs with memory effects. The indirect learning architecture is adopted to design the predistortion scheme and the reeursive least squares algorithm with forgetting factor is applied to identify the parameters of the predistorter. Simulation results show that the proposed predistortion method can compensate the nonlinear distortion and memory effects of broadband RF PAs effectively.

Multislice behavioral modeling based on envelope domain for power amplifiers

An envelope domain multislice behavioral modeling is introduced. The tradition AM-AM and AM- PM characteristics of power amplifiers axe extended to envelope domain and base-band filter is applied to distortion complex envelope signal for description of the envelope memory effect. Using traditional one and two-tone tests, the coefficients of nonlinear model and the FIR filter can be extracted. At last the model has been applied to a 10 W WCDMA Power amplifier to predict its output signal. And simulation results show that the model output conforms very well to the traditional transistor level simulation results.