Real-time embedded software testing method based on extended finite state machine

The reliability of real-time embedded software directly determines the reliability of the whole real-time embedded sys- tem, and the effective software testing is an important way to ensure software quality and reliability. Based on the analysis of the characteristics of real-time embedded software, the formal method is introduced into the real-time embedded software testing field and the real-time extended finite state machine （RT-EFSM） model is studied firstly. Then, the time zone division method of real-time embedded system is presented and the definition and description methods of time-constrained transition equivalence class （timeCTEC） are presented. Furthermore, the approaches of the testing sequence and test case generation are put forward. Finally, the proposed method is applied to a typical avionics real- time embedded software testing practice and the examples of the timeCTEC, testing sequences and test cases are given. With the analysis of the testing result, the application verification shows that the proposed method can effectively describe the real-time embedded software state transition characteristics and real-time requirements and play the advantages of the formal methods in accuracy, effectiveness and the automation supporting. Combined with the testing platform, the real-time, closed loop and automated simulation testing for real-time embedded software can be realized effectively.

Verifying the accuracy of interlocking tables for railway signalling systems using abstract state machines

Railway transportation system is a critical sector where design methods and techniques are defined by international standards in order to reduce possible risks to an acceptable minimum level. CENELEC 50128 strongly recommends the utilization of finite state machines during system modelling stage and formal proof methods during the verifi- cation and testing stages of control algorithms. Due to the high importance of interlocking table at the design state of a sig- nalization system, the modelling and verification of inter- locking tables are examined in this work. For this purpose, abstract state machines are used as a modelling tool. The developed models have been performed in a generalized structure such that the model control can be done automatically for the interlocking systems. In this study, NuSMV is used at the verification state. Also, the consistency of the developed models has been supervised through fault injection. The developed models and software components are applied on a real railway station operated by Metro Istanbul Co.

EDSM-Based Binary Protocol State Machine Reversing

Internet communication protocols define the behavior rules of network components when they communicate with each other.With the continuous development of network technologies,many private or unknown network protocols are emerging in endlessly various network environments.Herein,relevant protocol specifications become difficult or unavailable to translate in many situations such as network security management and intrusion detection.Although protocol reverse engineering is being investigated in recent years to perform reverse analysis on the specifications of unknown protocols,most existing methods have proven to be time-consuming with limited efficiency,especially when applied on unknown protocol state machines.This paper proposes a state merging algorithm based on EDSM(Evidence-Driven State Merging)to infer the transition rules of unknown protocols in form of state machines with high efficiency.Compared with another classical state machine inferring method based on Exbar algorithm,the experiment results demonstrate that our proposed method could run faster,especially when dealing with massive training data sets.In addition,this method can also make the state machines have higher similarities with the reference state machines constructed from public specifications.

Global Control Simulation of Electric Vehicle Based on Finite State Machine Theory

Finite state machine theory (FSM) is introduced and applied to global control of electric vehicle. Theoretical adaptation for application of FSM in control of electric vehicle is analyzed. Global control logic for parts of electric vehicle is analyzed and built based on FSM. Using Matlab/Simulink, BJD6100-HEV global control algorithm is modeled and prove validity by simulation.

Balancing four-state continuous-variable quantum key distribution with linear optics cloning machine

We show that the secret key generation rate can be balanced with the maximum secure distance of four-state continuous-variable quantum key distribution（CV-QKD） by using the linear optics cloning machine（LOCM）. Benefiting from the LOCM operation, the LOCM-tuned noise can be employed by the reference partner of reconciliation to achieve higher secret key generation rates over a long distance. Simulation results show that the LOCM operation can flexibly regulate the secret key generation rate and the maximum secure distance and improve the performance of four-state CV-QKD protocol by dynamically tuning parameters in an appropriate range.

An Algorithm for Idle-State Detection and Continuous Classifier Design in Motor-Imagery-Based BCI

Abstract-The development of asynchronous brain-computer interface （BCI） based on motor imagery （M1） poses the research in algorithms for detecting the nontask states （i.e., idle state） and the design of continuous classifiers that classify continuously incoming electroencephalogram （EEG） samples. An algorithm is proposed in this paper which integrates two two-class classifiers to detect idle state and utilizes a sliding window to achieve continuous outputs. The common spatial pattern （CSP） algorithm is used to extract features of EEG signals and the linear support vector machine （SVM） is utilized to serve as classifier. The algorithm is applied on dataset IVb of BCI competition Ⅲ, with a resulting mean square error of 0.66. The result indicates that the proposed algorithm is feasible in the first step of the development of asynchronous systems.

基于EFSM的智能车间制造系统生产物流建模与仿真

制造业的生产物流方式处于不断变革中,对其建模仿真可为制造系统规划设计、分析及改造提供决策支持。依“人-机-物-环-法”分类给出了智能车间制造系统中实体元素的描述,结合EFSM(extended finite state machine)和组件化建模思想,建立了生产和物流组件化EFSM模型;阐述了智能车间多作业生产的建模过程以及组件模型实例化方法;通过EFSM-DEVS(discrete event system specification)模型自动转换及DEVS引擎完成了仿真运行。仿真结果表明:该方法所建立的模型更符合车间实际状况,适用性更广;组件化建模思想能构造更具扩展性的软件;建模及仿真运行的3D可视化使软件直观性更好,其仿真结果与AnyLogic保持一致。

M-LSM:An Improved Multi-Liquid State Machine for Event-Based Vision Recognition

Event-based computation has recently gained increasing research interest for applications of vision recogni-tion due to its intrinsic advantages on efficiency and speed.However,the existing event-based models for vision recogni-tion are faced with several issues,such as large network complexity and expensive training cost.In this paper,we propose an improved multi-liquid state machine(M-LSM)method for high-performance vision recognition.Specifically,we intro-duce two methods,namely multi-state fusion and multi-liquid search,to optimize the liquid state machine(LSM).Multi-state fusion by sampling the liquid state at multiple timesteps could reserve richer spatiotemporal information.We adapt network architecture search(NAS)to find the potential optimal architecture of the multi-liquid state machine.We also train the M-LSM through an unsupervised learning rule spike-timing dependent plasticity(STDP).Our M-LSM is evalu-ated on two event-based datasets and demonstrates state-of-the-art recognition performance with superior advantages on network complexity and training cost.

Modeling and TOPSIS-GRA Algorithm for Autonomous Driving Decision-Making Under 5G-V2X Infrastructure

This paper is to explore the problems of intelligent connected vehicles(ICVs)autonomous driving decision-making under a 5G-V2X structured road environment.Through literature review and interviews with autonomous driving practitioners,this paper firstly puts forward a logical framework for designing a cerebrum-like autonomous driving system.Secondly,situated on this framework,it builds a hierarchical finite state machine(HFSM)model as well as a TOPSIS-GRA algorithm for making ICV autonomous driving decisions by employing a data fusion approach between the entropy weight method(EWM)and analytic hierarchy process method(AHP)and by employing a model fusion approach between the technique for order preference by similarity to an ideal solution(TOPSIS)and grey relational analysis(GRA).The HFSM model is composed of two layers:the global FSM model and the local FSM model.The decision of the former acts as partial input information of the latter and the result of the latter is sent forward to the local pathplanning module,meanwhile pulsating feedback to the former as real-time refresh data.To identify different traffic scenarios in a cerebrum-like way,the global FSM model is designed as 7 driving behavior states and 17 driving characteristic events,and the local FSM model is designed as 16 states and 8 characteristic events.In respect to designing a cerebrum-like algorithm for state transition,this paper firstly fuses AHP weight and EWM weight at their output layer to generate a synthetic weight coefficient for each characteristic event;then,it further fuses TOPSIS method and GRA method at the model building layer to obtain the implementable order of state transition.To verify the feasibility,reliability,and safety of theHFSMmodel aswell as its TOPSISGRA state transition algorithm,this paper elaborates on a series of simulative experiments conducted on the PreScan8.50 platform.The results display that the accuracy of obstacle detection gets 98%,lane line prediction is beyond 70 m,the speed of collision avoidance is higher than 45 km/h,the distance of collision avoidance is less than 5 m,path planning time for obstacle avoidance is averagely less than 50 ms,and brake deceleration is controlled under 6 m/s2.These technical indexes support that the driving states set and characteristic events set for the HFSM model as well as its TOPSIS-GRA algorithm may bring about cerebrum-like decision-making effectiveness for ICV autonomous driving under 5G-V2X intelligent road infrastructure.

DSML ProcGraph: Overview and a Mid-Size Industrial Application Example

This paper presents model-based approach to process-control software development. The presented approach enables modelling of control software in a straightforward manner and, at the same time, on a high level of abstraction. The essence of the presented approach is a high-level, domain-specific modelling language ProcGraph, which is based on three types of diagrams that describe the modelled system using a domain-oriented hierarchical structure of interdependent procedural control entities and state-transition diagrams describing the behaviour of the procedural control entities. The presented concept is demonstrated by means of higher-level model segments of a real process-control application that deals with the micronisation process in the production of titanium dioxide. The presented industrial case shows that the application of ProcGraph provides adequate expressive power for an elegant preparation of graphic specifications in a transparent and easy way.

Test Data Generation for Stateful Network Protocol Fuzzing Using a Rule-Based State Machine

To improve the efficiency and coverage of stateful network protocol fuzzing, this paper proposes a new method, using a rule-based state machine and a stateful rule tree to guide the generation of fuzz testing data. The method first builds a rule-based state machine model as a formal description of the states of a network protocol. This removes safety paths, to cut down the scale of the state space. Then it uses a stateful rule tree to describe the relationship between states and messages, and then remove useless items from it. According to the message sequence obtained by the analysis of paths using the stateful rule tree and the protocol specification, an abstract data model of test case generation is defined. The fuzz testing data is produced by various generation algorithms through filling data in the fields of the data model. Using the rule-based state machine and the stateful rule tree, the quantity of test data can be reduced. Experimental results indicate that our method can discover the same vulnerabilities as traditional approaches, using less test data, while optimizing test data generation and improving test efficiency.

Specifying Requirements of Real-Time System with Rules and Templates

This paper presents a model specifying requirements of real-time systems. Different from existing researches, this model mainly uses rules and templates to represent hierarchical FSMs (Finite State Machine). In this model, one rule corresponds to one state transition of FSM and one template corresponds to one FSM. Rules and information with respect to a FSM can be written in a template. So templates include not only state diagrams, but also information that can not be described by FSM, such as performance requirements. The specification using this model consists of a collection of templates and it is easy for users to understand and to review. After introduced the related researches and principles of the model, this paper specifies requirements of a real-time system with this model, and discusses characters of this model in the end.

Towards a Formal Semantics for UML/MARTE State Machines Based on Hierarchical Timed Automata

UML is a widely-used, general purpose modeling language. But its lack of a rigorous semantics forbids the thorough analysis of designed solution, and thus precludes the discovery of significant problems at design time. To bridge the gap, the paper investigates the underlying semantics of UML state machine diagrams, along with the time-related modeling elements of MARTE, the profile for modeling and analysis of real-time embedded systems, and proposes a formal operational semantics based on extended hierarchical timed automata. The approach is exemplified on a simple example taken from the automotive domain. Verification is accomplished by translating designed models into the input language of the UPPAAL model checker.

Multiple UIO-based test sequence generation for distributed systems

In developing distributed systems, conformance testing is required to determine whether an implementation under test （IUT） conforms to its specification. With distributed test architectures involving multiple remote testers, testing approaches may become more complicated because of issues known as controllability and observability problems. Based on a finite state machine （FSM） representation of the system＇s specification, this paper proposes a new method to generate a test sequence utilizing multiple UIO sequences. The method is essentially guided by the way of minimizing the use of external coordination messages and input/output operations. Experiments are given to evaluate the proposed method.

Application of Finite State Machine Theory to the Simulation of Reversed Non-Linear Hysteretic Relationships

This paper presents the application of finite state machine (FSM) theory to the programming of nonlinear hysteretic model simulation for both known and newly created rules. The complicated reversed internal paths involved in the nonlinear relationship which not only depend on material properties, but also on load history, often confuse rule creators and scholars. In this paper, we first describe the development of past hysteretic models. Then we introduce the FSM theory conceptually, and explain how it is applied to reversed and diverse routes. Next, state definitions and procedures are explained with a specific data example using the bilinear model. Finally, the successful application to UC-win/FRAME (3D) is described and several characteristics are summarized. By using FSM’s states and the linkages to represent a hysteresis model, we can quickly realize the programming of the defined complex model rules, and the nonlinear modeling becomes more efficient and feasible.

OPEN ARCHITECTURE CNC SYSTEM HITCNC AND KEY TECHNOLOGY

Aiming at the characteristics of modularity and reconfigurable in open architecture computer numerical control （CNC） system, the open architecture CNC system, Harbin Institute of Tech- nology computer numerical control （HITCNC）, is researched and manufactured based on the interface standards. The system＇s external interfaces are coincident with the corresponding international standards, and the internal interfaces follow the open modular architecture controller （OMAC） agreement. In the research and manufacturing process, object-oriented technology is used to ensure the openness of the HITCNC, and static programming is applied in the CNC system according to the idea of modularization disassembly. The HITCNC also actualizes real-time and unreal-time modules adopting real-time dynamical linked library （RTDLL） and component object model （COM）. Finite state ma- chine （FSM） is adopted to do dynamically modeling of HITCNC. The complete separation between the software and the hardware is achieved in the HITCNC by applying the SoftSERCANS technique. The application of the above key techniques decreases the programming workload greatly, and uses software programs replacing hardware functions, which offers plenty technique ensures for the openness of HITCNC. Finally, based on the HITCNC, a three-dimensional milling system is established. On the system, series experiments are done to validate the expandability and interchangeability of HITCNC. The results of the experiments show that the established open architecture CNC system HITCNC is correct and feasible, and has good openness.

Aspect-Oriented Modeling and Verification with Finite State Machines

Aspect-oriented programming modularizes crosscutting concerns into aspects with the advice invoked at the specified points of program execution. Aspects can be used in a harmful way that invalidates desired properties and even destroys the conceptual integrity of programs. To assure the quality of an aspect-oriented system, rigorous analysis and design of aspects are highly desirable. In this paper, we present an approach to aspect-oriented modeling and verification with finite state machines. Our approach provides explicit notations （e.g., pointcut, advice and aspect） for capturing crosscutting concerns and incremental modification requirements with respect to class state models. For verification purposes, we compose the aspect models and class models in an aspect-oriented model through a weaving mechanism. Then we transform the woven models and the class models not affected by the aspects into FSP （Finite State Processes）, which are to be checked by the LTSA （Labeled Transition System Analyzer） model checker against the desired system properties. We have applied our approach to the modeling and verification of three aspect-oriented systems. To further evaluate the effectiveness of verification, we created a large number of flawed aspect models and verified them against the system requirements. The results show that the verification has revealed all flawed models. This indicates that our approach is effective in quality assurance of aspect-oriented state models. As such, our approach can be used for model-checking state-based specification of aspect-oriented design and can uncover some system design problems before the system is implemented.

State space optimization of finite state machines from the viewpoint of control theory

Motivated by the inconvenience or even inability to explain the mathematics of the state space optimization of finite state machines(FSMs)in most existing results,we consider the problem by viewing FSMs as logical dynamic systems.Borrowing ideas from the concept of equilibrium points of dynamic systems in control theory,the concepts of t-equivalent states and t-source equivalent states are introduced.Based on the state transition dynamic equations of FSMs proposed in recent years,several mathematical formulations of t-equivalent states and t-source equivalent states are proposed.These can be analogized to the necessary and sufficient conditions of equilibrium points of dynamic systems in control theory and thus give a mathematical explanation of the optimization problem.Using these mathematical formulations,two methods are designed to find all the t-equivalent states and t-source equivalent states of FSMs.Further,two ways of reducing the state space of FSMs are found.These can be implemented without computers but with only pen and paper in a mathematical manner.In addition,an open question is raised which can further improve these methods into unattended ones.Finally,the correctness and effectiveness of the proposed methods are verified by a practical language model.

A matrix-based static approach to analysis of finite state machines

Traditional matrix-based approaches in the field of finite state machines construct state transition matrices,and then use the powers of the state transition matrices to represent corresponding dynamic transition processes,which are cornerstones of system analysis.In this study,we propose a static matrix-based approach that revisits a finite state machine from its structure rather than its dynamic transition process,thus avoiding the“explosion of complexity”problem inherent in the existing approaches.Based on the static approach,we reexamine the issues of closed-loop detection and controllability for deterministic finite state machines.In addition,we propose controllable equivalent form and minimal controllable equivalent form concepts and give corresponding algorithms.

Formal Reduction of Interfaces to Large-scale Process Control Systems

A formal methodology is proposed to reduce the amount of information displayed to remote human operators at interfaces to large-scale process control plants of a certain type. The reduction proceeds in two stages. In the first stage, minimal reduced subsets of components, which give full information about the state of the whole system, are generated by determining functional dependencies between components. This is achieved by using a temporal logic proof obligation to check whether the state of all components can be inferred from the state of components in a subset in specified situations that the human operator needs to detect, with respect to a finite state machine model of the system and other human operator behavior. Generation of reduced subsets is automated with the help of a temporal logic model checker. The second stage determines the interconnections between components to be displayed in the reduced system so that the natural overall graphical structure of the system is maintained. A formal definition of an aesthetic for the required subgraph of a graph representation of the full system, containing the reduced subset of components, is given for this purpose. The methodology is demonstrated by a case study.