Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi...Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.展开更多
Synergistic effects of the total ionizing dose （TID） on the single event upset （SEU） sensitivity in static random access memories （SRAMs） were studied by using protons. The total dose was cumulated with high flu...Synergistic effects of the total ionizing dose （TID） on the single event upset （SEU） sensitivity in static random access memories （SRAMs） were studied by using protons. The total dose was cumulated with high flux protons during the TID exposure, and the SEU cross section was tested with low flux protons at several cumulated dose steps. Because of the radiation-induced off-state leakage current increase of the CMOS transistors, the noise margin became asymmetric and the memory imprint effect was observed.展开更多
Pattem imprinting in deep sub-micron static random access memories （SRAMs） during total dose irradiation is inves- tigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiat...Pattem imprinting in deep sub-micron static random access memories （SRAMs） during total dose irradiation is inves- tigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiation is gradually imprinted on their background data pattern. We build a relationship between the memory cell＇s static noise margin （SNM） and the background data, and study the influence of irradiation on the probability density function of ASNM, which is the difference between two data sides＇ SNMs, to discuss the reason for pattern imprinting. Finally, we demonstrate that, for micron and deep sub-micron devices, the mechanism of pattern imprinting is the bias-dependent threshold shift of the transistor, but for a deep sub-micron device the shift results from charge trapping in the shallow trench isolation （STI） oxide rather than from the gate oxide of the micron-device.展开更多
In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing ...In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing direct measurement of the static noise margin（SNM） is specifically designed and irradiated by gamma-ray. Both data sides＇ SNM of 130 nm PD SOI SRAM cell are decreased by TID, which is different from the conclusion obtained in old generation devices that one data side＇s SNM is decreased and the other data side＇s SNM is increased. Moreover, measurement of SNM under different supply voltages（Vdd） reveals that SNM is more sensitive to TID under lower Vdd. The impact of TID on SNM under data retention Vddshould be tested, because Vddof SRAM cell under data retention mode is lower than normal Vdd.The mechanism under the above results is analyzed by measurement of I–V characteristics of SRAM cell transistors.展开更多
An internal single event upset（SEU）mitigation technique is proposed,which reads back the configuration frames from the static random access memory（SRAM）-based field programmable gate array（FPGA）through an intern...An internal single event upset（SEU）mitigation technique is proposed,which reads back the configuration frames from the static random access memory（SRAM）-based field programmable gate array（FPGA）through an internal port and compares them with those stored in the radiationhardened memory to detect and correct SEUs.Triple modular redundancy（TMR）,which triplicates the circuit of the technique and uses majority voters to isolate any single upset within it,is used to enhance the reliability.Performance analysis shows that the proposed technique can satisfy the requirement of ordinary aerospace missions with less power dissipation,size and weight.The fault injection experiment validates that the proposed technique is capable of correcting most errors to protect spaceborne facilities from SEUs.展开更多
基金supported by the State Key Program of the National Natural Science Foundation of China (Grant No.60836004)the National Natural Science Foundation of China (Grant Nos.61076025 and 61006070)
文摘Using computer-aided design three-dimensional （3D） simulation technology, the recovery mechanism of single event upset and the effects of spacing and hit angle on the recovery are studied. It is found that the multi-node charge collection plays a key role in recovery and shielding the charge sharing by adding guard rings. It cannot exhibit the recovery effect. It is also indicated that the upset linear energy transfer （LET） threshold is kept constant while the recovery LET threshold increases as the spacing increases. Additionally, the effect of incident angle on recovery is analysed and it is shown that a larger angle can bring about a stronger charge sharing effect, thus strengthening the recovery ability.
基金supported by the Open Foundation of State Key Laboratory of Electronic Thin Films and Integrated Devices,China(Grant No.KFJJ201306)
文摘Synergistic effects of the total ionizing dose （TID） on the single event upset （SEU） sensitivity in static random access memories （SRAMs） were studied by using protons. The total dose was cumulated with high flux protons during the TID exposure, and the SEU cross section was tested with low flux protons at several cumulated dose steps. Because of the radiation-induced off-state leakage current increase of the CMOS transistors, the noise margin became asymmetric and the memory imprint effect was observed.
文摘Pattem imprinting in deep sub-micron static random access memories （SRAMs） during total dose irradiation is inves- tigated in detail. As the dose accumulates, the data pattern of memory cells loading during irradiation is gradually imprinted on their background data pattern. We build a relationship between the memory cell＇s static noise margin （SNM） and the background data, and study the influence of irradiation on the probability density function of ASNM, which is the difference between two data sides＇ SNMs, to discuss the reason for pattern imprinting. Finally, we demonstrate that, for micron and deep sub-micron devices, the mechanism of pattern imprinting is the bias-dependent threshold shift of the transistor, but for a deep sub-micron device the shift results from charge trapping in the shallow trench isolation （STI） oxide rather than from the gate oxide of the micron-device.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.U1532261 and 11605282)the Opening Fund of Key Laboratory of Silicon Device Technology,Chinese Academy of Sciences Research Projects(Grant No.KLSDTJJ2016-07)
文摘In this work, the total ionizing dose（TID） effect on 130 nm partially depleted（PD） silicon-on-insulator（SOI） static random access memory（SRAM） cell stability is measured. The SRAM cell test structure allowing direct measurement of the static noise margin（SNM） is specifically designed and irradiated by gamma-ray. Both data sides＇ SNM of 130 nm PD SOI SRAM cell are decreased by TID, which is different from the conclusion obtained in old generation devices that one data side＇s SNM is decreased and the other data side＇s SNM is increased. Moreover, measurement of SNM under different supply voltages（Vdd） reveals that SNM is more sensitive to TID under lower Vdd. The impact of TID on SNM under data retention Vddshould be tested, because Vddof SRAM cell under data retention mode is lower than normal Vdd.The mechanism under the above results is analyzed by measurement of I–V characteristics of SRAM cell transistors.
基金Supported by the National High Technology and Development Program of China(2013AA1548)
文摘An internal single event upset（SEU）mitigation technique is proposed,which reads back the configuration frames from the static random access memory（SRAM）-based field programmable gate array（FPGA）through an internal port and compares them with those stored in the radiationhardened memory to detect and correct SEUs.Triple modular redundancy（TMR）,which triplicates the circuit of the technique and uses majority voters to isolate any single upset within it,is used to enhance the reliability.Performance analysis shows that the proposed technique can satisfy the requirement of ordinary aerospace missions with less power dissipation,size and weight.The fault injection experiment validates that the proposed technique is capable of correcting most errors to protect spaceborne facilities from SEUs.
