Novel vertical stack HCMOSFET with strained SiGe/Si quantum channel

A novel vertical stack heterostructure CMOSFET is investigated, which is structured by strained SiGe/Si with a hole quantum well channel in the compressively strained Sil-xGex layer for p-MOSFET and an electron quantum well channel in the tensile strained Si layer for n-MOSFET. The device possesses several advantages including： 1） the integration of electron quantum well channel with hole quantum well channel into the same vertical layer structure; 2） the gate work function modifiability due to the introduction of poly-SiGe as a gate material; 3） better transistor matching; and 4） flexibility of layout design of CMOSFET by adopting exactly the same material lays for both n-channel and p-channel. The MEDICI simulation result shows that p-MOSFET and n-MOSFET have approximately the same matching threshold voltages. Nice performances are displayed in transfer characteristic, transconductance and cut-off frequency. In addition, its operation as an inverter confirms the CMOSFET structured device to be normal and effective in function.

Effect of substrate doping on threshold voltages of buried channel pMOSFET based on strained-SiGe technology

The effect of substrate doping on the threshold voltages of buried channel pMOSFET based on strained-SiGe technology was studied.By physically deriving the models of the threshold voltages,it is found that the layer which inversely occurs first is substrate doping dependent,giving explanation for the variation of plateau observed in the C-V characteristics of this device,as the doping concentration increases.The threshold voltages obtained from the proposed model are-1.2805 V for buried channel and-2.9358 V for surface channel at a lightly doping case,and-3.41 V for surface channel at a heavily doping case,which agrees well with the experimental results.Also,the variations of the threshold voltages with several device parameters are discussed,which provides valuable reference to the designers of strained-SiGe devices.

The KP Dispersion Relation Near the Δ~i Valley in Strained Si_(1-x)Ge_x/Si

Based on an analysis of symmetry, the dispersion relations near the Ai valley in strained Si1-x Gex （0≤x〈0.45）/ （001）, （111）, （101）Si are derived using the KP method with perturbation theory. These relations demonstrate that △^i levels in strained Si1-x Gex are different from the △1 level in relaxed Si1-x Gex, while the longitudinal and transverse masses （m1^＊ and mt^＊ ） are unchanged under strain. The energy shift between the △^i levels and the △1 level follows the linear deformation potential theory. Finally,a description of the conduction band （CB） edge in biaxially strained layers is given.

An analytical threshold voltage model for dual-strained channel PMOSFET

Based on the analysis of vertical electric potential distribution across the dual-channel strained p-type Si/strained Si1-xGex/relaxd Si1-yGey（s-Si/s-SiGe/Si1-yGey） metal-oxide-semiconductor field-effect transistor （PMOSFET）, analytical expressions of the threshold voltages for buried channel and surface channel are presented. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel （compressive strained SiGe） than in the surface channel （tensile strained Si）, because the hole mobility in the buried channel is higher than that in the surface channel. Thus they offer a good accuracy as compared with the results of device simulator ISE. With this model, the variations of threshold voltage and maximum allowed thickness of s-Si with design parameters can be predicted, such as Ge fraction, layer thickness, and doping concentration. This model can serve as a useful tool for p-channel s-Si/s-SiGe/Si1-yGey metal-oxide-semiconductor field-effect transistor （MOSFET） designs.