New Lateral Super Junction MOSFETs with n^+-Floating Layer on High-Resistance Substrate

A new super junction LDMOST structure that suppresses the substrate-assisted depletion effect is designed with an n^＋-floating layer embedded in the high-resistance p-type substrate by implanting phosphor or arsenic. This effect results from a charge imbalance between the n-type and p-type pillars when the n-type pillars are depleted by p-type substrate. The high electric field around the drain is reduced by the n^＋-floating layer due to the REBULF effect,which causes the redistribution of the bulk electric field in the drift region,and thus the substrate supports more biases. The new structure features high breakdown voltage, low on-resistance,and charge balance in the drift region.

Realizing High Breakdown Voltage SJ-LDMOS on Bulk Silicon Using a Partial n-Buried Layer

A new design concept is proposed to eliminate the substrate-assisted depletion effect that significantly degrades the breakdown voltage （BV） of conventional super junction-LDMOS. The key feature of the new concept is that a partial buried layer is implemented which compensates for the charge interaction between the p-substrate and SJ region,realizing high breakdown voltage and low on-resistance. Numerical simulation results indicate that the proposed device features high breakdown voltage,low on-resistance,and reduced sensitivity to doping imbalance in the pillars. In addition, the proposed device is compatible with smart power technology.

基于BCD工艺的局部电荷补偿超结LDMOS

针对功率集成电路中的高压器件应用,提出一种局部电荷补偿超结横向双扩散金属氧化物半导体(LDMOS)器件结构。利用常规LDMOS工艺,通过调整n阱的版图尺寸,在漏区形成局部的电荷补偿,可以缓解横向超结器件中存在的衬底辅助耗尽效应,促进超结的电荷平衡。n型电荷补偿区与p型衬底在超结下方形成pn结,可以同时优化横向和纵向电场分布,提高超结器件的耐压。此器件结构可以通过BCD工艺实现,适用于功率集成电路。三维器件仿真结果表明,新结构的器件耐压达到490 V,较常规的电荷补偿超结器件提高了53%。

Super junction LDMOS with enhanced dielectric layer electric field for high breakdown voltage

The lateral super junction （SJ） power devices suffer the substrate-assisted depletion （SAD） effect, which breaks the charge balance of SJ resulting in the low breakdown voltage （BV）. A solution based on enhancing the electric field of the dielectric buried layer is investigated for improving the BV of super junction LDMOSFET （SJ-LDMOS）. High density interface charges enhance the electric field in the buried oxide （BOX） layer to increase the block voltage of BOX, which suppresses the SAD effect to achieve the charge balance of SJ. In order to obtain the linear enhancement of electric field, SO1 SJ-LDMOS with trenched BOX is presented. Because the trenched BOX self-adaptively collects holes according to the variable electric field strength, the approximate linear charge distribution is formed on the surface of the BOX to enhance the electric field according to the need. As a result, the charge balance between N and P pillars of SJ is achieved, which improves the BV of SJ-LDMOS to close that of the idea SJ structure.

Binder-free electrodes for advanced potassium-ion batteries:A review

Potassium-ion batteries(PIBs)have attracted enormous attention due to the abundance of potassium resources,low cost,fast ionic conductivity of electrolyte and relatively high operating voltage.Despite great effo rts and progress,researches on PIBs are still at the initial stage,especially in the emerging field of flexible and wearable PIBs.The inevitable challenges for PIBs include low reversible capacity,unsatisfactory cycling stability and insufficient energy density,the solution to which mostly relies on designing adva nced electrodes.Binder-free electrodes have emerged as promising electrode architecture for PIBs.Such electrodes avoid the use of insulating binders,which can be designed with various synergistic functional materials to address the aforementioned PIB issues and be endowed with flexibility/wearability.In this review,we mainly summarize the recent progress on binde r-free electrodes for PIBs,with the focus on the methodologies,detailed strategies and functional materials for electrode construction.One strategy for binder-free electrodes is to assemble free-standing architecture with the help of carbon nanotubes(CNTs),graphitic fibers,and other carbon or mechanically robust materials,either alone or in combination.The other effective strategy is current collector substrate-assisted direct growth,including the use of carbon cloth,metal.MXenes and other conductive substrates.Additionally,challenges and research opportunities are put forward at the end as the guidance for future development of binder-free PIB devices.

A novel SOI high-voltage SJ-pLDMOS based on self-adaptive charge balance

A new SOl self-balance （SB） super-junction （S J） pLDMOS with a self-adaptive charge （SAC） layer and its physical model are presented. The SB is an effective way to realize charges balance （CB）. The substrate-assisted depletion （SAD） effect of the lateral SJ is eliminated by the self-adaptive inversion electrons provided by the SAC. At the same time, high concentration dynamic self-adaptive electrons effectively enhance the electric field （EI） of the dielectric buried layer and increase breakdown voltage （BV）. E1 = 600 V/μm and BV =- 237 V are obtained by 3D simulation on a 0.375-μm-thick dielectric layer and a 2.5-μm-thick top silicon layer. The optimized structure realizes the specific on resistance （Ron,sp） of 0.01319Ω·cm2, FOM （FOM = BV2/R p） of 4.26 MW/cm2 under a 11 μm length （Ld） drift region.