Temperature-dependent characteristics of 4H-SiC junction barrier Schottky diodes

The current-voltage characteristics of 4H-SiC junction barrier Schottky （JBS） diodes terminated by an offset field plate have been measured in the temperature range of 25-300℃. An experimental barrier height value of about 0.5 eV is obtained for the Ti/4H-SiC JBS diodes at room temperature. A decrease in the experimental barrier height and an increase in the ideality factor with decreasing temperature are shown. Reverse recovery testing also shows the temperature dependence of the peak recovery current density and the reverse recovery time. Finally, a discussion of reducing the reverse recovery time is presented.

Investigations on mesa width design for 4H–SiC trench super junction Schottky diodes

Mesa width （WM） is a key design parameter for SiC super junction （SJ） Schottky diodes （SBD） fabricated by the trench-etching-and-sidewall-implant method. This paper carries out a comprehensive investigation on how the mesa width design determines the device electrical performances and how it affects the degree of performance degradation induced by process variations. It is found that structures designed with narrower mesa widths can tolerant substantially larger charge imbalance for a given BV target, but have poor specific on-resistances. On the contrary, structures with wider mesa widths have superior on-state performances but their breakdown voltages are more sensitive to p-type doping variation. Medium WM structures （-2 p.m） exhibit stronger robustness against the process variation resulting from SiC deep trench etching. Devices with 2-p.m mesa width were fabricated and electrically characterized. The fabricated SiC SJ SBDs have achieved a breakdown voltage of 1350 V with a specific on-resistance as low as 0.98 mΩ2.cm2. The estimated specific drift on- resistance by subtracting substrate resistance is well below the theoretical one-dimensional unipolar limit of SiC material. The robustness of the voltage blocking capability against trench dimension variations has also been experimentally verified for the proposed SiC SJ SBD devices.

Study and optimal simulation of 4H-SiC floating junction Schottky barrier diodes' structures and electric properties

This paper stuides the structures of 4H SiC floating junction Schottky barrier diodes. Some structure parameters of devices are optimized with commercial simulator based on forward and reverse electrical characteristics. Compared with conventional power Schottky barrier diodes, the devices are featured by highly doped drift region and embedded floating junction layers, which can ensure high breakdown voltage while keeping lower specific on-state resistance, and solve the contradiction between forward voltage drop and breakdown voltage. The simulation results show that with optimized structure parameter, the breakdown voltage can reach 4.36 kV and the specific on-resistance is 5.8 mΩ.cm2 when the Baliga figure of merit value of 13.1 GW/cm2 is achieved.

Modeling of 4H-SiC multi-floating-junction Schottky barrier diode

This paper develops a new and easy to implement analytical model for the specific on-resistance and electric field distribution along the critical path for 4H-SiC multi-floating junction Schottky barrier diode. Considering the charge compensation effects by the multilayer of buried opposite doped regions, it improves the breakdown voltage a lot in comparison with conventional one with the same on-resistance. The forward resistance of the floating junction Schottky barrier diode consists of several components and the electric field can be understood with superposition concept, both are consistent with MEDICI simulation results. Moreover, device parameters are optimized and the analyses show that in comparison with one layer floating junction, multilayer of floating junction layer is an effective way to increase the device performance when specific resistance and the breakdown voltage are traded off. The results show that the specific resistance increases 3.2 mΩ.cm2 and breakdown voltage increases 422 V with an additional floating junction for the given structure.

Study of 4H-SiC junction barrier Schottky diode using field guard ring termination

This paper reports that the 4H-SiC Schottky barrier diode, PiN diode and junction barrier Schottky diode terminated by field guard rings are designed, fabricated and characterised. The measurements for forward and reverse characteristics have been done, and by comparison with each other, it shows that junction barrier Schottky diode has a lower reverse current density than that of the Schottky barrier diode and a higher forward drop than that of the PiN diode. High-temperature annealing is presented in this paper as well to figure out an optimised processing. The barrier height of 0.79 eV is formed with Ti in this work, the forward drop for the Schottky diode is 2.1 V, with an ideality factor of 3.2, and junction barrier Schottky diode with blocking voltage higher than 400 V was achieved by using field guard ring termination.

High-performance 4H-SiC junction barrier Schottky diodes with double resistive termination extensions

4H-SiC junction barrier Schottky （JBS） diodes with a high-temperature annealed resistive termination extension （HARTE） are designed, fabricated and characterized in this work. The differential specific on-state resistance of the device is as low as 3.64 mΩ·cm^2 with a total active area of 2.46× 10 ^-3 cm^2. Ti is the Schottky contact metal with a Schottky barrier height of 1.08 V and a low onset voltage of 0.7 V. The ideality factor is calculated to be 1.06. Al implantation annealing is performed at 1250 ℃ in Ar, while good reverse characteristics are achieved. The maximum breakdown voltage is 1000 V with a leakage current of 9× 10^-5 A on chip level. These experimental results show good consistence with the simulation results and demonstrate that high-performance 4H-SiC JBS diodes can be obtained based on the double HARTE structure.

Design of vertical diamond Schottky barrier diode with junction terminal extension structure by using the n-Ga_(2)O_(3)/p-diamond heterojunction

A novel junction terminal extension structure is proposed for vertical diamond Schottky barrier diodes(SBDs) by using an n-Ga_(2)O_(3)/p-diamond heterojunction. The depletion region of the heterojunction suppresses part of the forward current conduction path, which slightly increases the on-resistance. On the other hand, the reverse breakdown voltage is enhanced obviously because of attenuated electric field crowding. By optimizing the doping concentration, length, and depth of n-Ga_(2)O_(3), the trade-off between on-resistance and breakdown voltage with a high Baliga figure of merit(FOM)value is realized through Silvaco technology computer-aided design simulation. In addition, the effect of the work functions of the Schottky electrodes is evaluated. The results are beneficial to realizing a high-performance vertical diamond SBD.

High performance trench diamond junction barrier Schottky diode with a sidewall-enhanced structure

The trench diamond junction barrier Schottky(JBS)diode with a sidewall enhanced structure is designed by Silvaco simulation.Comparing with the conventional trench JBS diode,Schottky contact areas are introduced on the sidewall of the trench beside the top cathode.The sidewall Schottky contact weakens the junction field-effect transistor effect between the trenches to realize a low on-resistance and a high Baliga's figure of merit(FOM)value.In addition,the existence of the n-type diamond helps to suppress the electric field crowding effect and enhance the reverse breakdown voltage.With the optimal parameters of device structure,a high Baliga's FOM value of 2.28 GW/cm^(2) is designed.Therefore,the proposed sidewall-enhanced trench JBS diode is a promising component for the applications in diamond power electronics.

Design optimization of high breakdown voltage vertical GaN junction barrier Schottky diode with high-K/low-K compound dielectric structure

A vertical junction barrier Schottky diode with a high-K/low-K compound dielectric structure is proposed and optimized to achieve a high breakdown voltage(BV).There is a discontinuity of the electric field at the interface of high-K and low-K layers due to the different dielectric constants of high-K and low-K dielectric layers.A new electric field peak is introduced in the n-type drift region of junction barrier Schottky diode(JBS),so the distribution of electric field in JBS becomes more uniform.At the same time,the effect of electric-power line concentration at the p-n junction interface is suppressed due to the effects of the high-K dielectric layer and an enhancement of breakdown voltage can be achieved.Numerical simulations demonstrate that GaN JBS with a specific on-resistance(R_(on,sp)) of 2.07 mΩ·cm^(2) and a BV of 4171 V which is 167% higher than the breakdown voltage of the common structure,resulting in a high figure-of-merit(FOM) of 8.6 GW/cm^(2),and a low turn-on voltage of 0.6 V.

Optimized design of 4H-SiC floating junction power Schottky barrier diodes

SiC floating junction Schottky barrier diodes were simulated with software MEDICI 4.0 and their device structures were optimized based on forward and reverse electrical characteristics. Compared with the conventional power Schottky barrier diode, the device structure is featured by a highly doped drift region and embedded floating junction region, which can ensure high breakdown voltage while keeping lower specific on-state resistance, solved the contradiction between forward voltage drop and breakdown voltage. The simulation results show that with opti- mized structure parameter, the breakdown voltage can reach 4 kV and the specific on-resistance is 8.3 mΩ·cm2.

Improvements on high voltage capacity and high temperature performances of Si-based Schottky potential barrier diode

In order to improve the reverse voltage capacity and low junction temperature characteristics of the traditional silicon-based Schottky diode,a Schottky diode with high reverse voltage capacity and high junction temperature was fabricated using ion implantation,NiPt60 sputtering,silicide-forming and other major technologies on an N-type silicon epitaxial layer of 10.6-11.4μm and（2.2-2.4）×10^15 cm^-3 doping concentration.The measurement results show that the junction temperature of the Schottky diode fabricated can reach 175 °C,that is 50°C higher than that of the traditional one;the reverse voltage capacity VR can reach 112 V,that is 80 V higher than that of the traditional one;the leakage current is only 2μA and the forward conduction voltage drop is VF=0.71 V at forward current If =3 A.

具有圆形P+区的1200 V SiC JBS二极管的研究

【目的】通过改变碳化硅(silicon carbide,SiC)结势垒肖特基二极管(junction barrier Schottky diode,JBS)的P+掺杂区的形状,将常规SiC JBS条形分布的P+掺杂区优化为圆形P+掺杂区,并两两之间以正三角形分布于肖特基接触之间。【方法】通过三维结构有限元仿真方法模拟以上两种SiC JBS结构的正反向特性,优化P+掺杂区宽度和外延层掺杂浓度,并进行对比分析。【结果】仿真结果显示,两种结构的反向击穿电压均高于1500 V,圆形P+掺杂区JBS二极管的正向导通压降比条形P+掺杂区JBS二极管的低:在正向电流密度为400 A/cm^(2)时,导通压降由条形P+结构的2.37 V降低至圆形P+结构的2.05 V,降低了13.5%;圆形P+结构在经过优化外延层掺杂浓度后,其在正向电流密度为400 A/cm^(2)时的导通压降为1.97 V,较条形P+结构的降低了16.9%。相较于条形SiC JBS,圆形P+结构具有更大的肖特基接触面积,在保证击穿电压的同时可以获得更低的导通压降,并通过优化器件的外延层掺杂浓度进一步降低器件的导通压降。【结论】本文将P+掺杂区形状由条形调整为圆形,并以正三角形分布排列。这种调整增大了器件的肖特基接触面积,优化了正向导通特性,并通过优化器件的外延层掺杂浓度进一步提高了导通特性,获得了更低的导通压降。

3300 V高性能混合SiC模块研制

将Si基绝缘栅双极型晶体管(Insulated gate bipolar transistor,IGBT)芯片与SiC结型势垒肖特基二极管芯片按照双开关电路结构排布,开发了一种3 300 V等级混合SiC模块,对其设计方法、封装工艺、仿真、测试结果进行分析,并对标相同规格IGBT模块。混合SiC模块低空洞率焊接满足牵引领域高温度循环周次的要求,冗余式的连跳键合结构可以有效增强功率循环能力。采用双脉冲法测试动态性能,测试结果表明该混合SiC模块反向恢复时间减小了84%,反向恢复电流减小了89.5%,反向恢复能量减小了99%,一次开关产生的总损耗降低了43.3%。混合SiC模块消除了开关过程中电压和电流过冲现象,在高电压、大电流和高频率的应用工况下具有明显的优势。

4H-SiC SBD和JBS退火研究

在4H-SiC外延材料上制备了SBD和JBS器件,研究并分析了退火温度对这两种器件正反向特性的影响。结果表明,低于350℃退火可同时提高SBD和JBS的正反向特性。当退火温度高于350℃时,二者的正向特性都出现退化,SBD退化较JBS更为严重。JBS阻断电压随退火温度升高而增大,在退火温度高于450℃时增加趋势变缓。SBD阻断电压随退火温度升高先升后降,在500℃退火时达到一个最大值。可见一定程度的退火有助于提高4H-SiCSBD和JBS器件的正反向特性,但须考虑其对正反向特性的不同影响。综合而言,退火优化后JBS优于SBD器件性能。

高压4H-SiC肖特基二极管的模拟及研制

结终端技术能提高4 H-SiC肖特基势垒二极管器件的耐压性能.利用仿真软件ISE-TCAD10.0对具有结终端扩展JTE保护的4 H-SiC SBD器件进行了仿真研究,并依据仿真优化好的参数试制了器件.实验测试结果表明,模拟优化结果与实验测试器件的结果一致性较好,实测此器件的反向电压值达2 000 V,接近理想击穿耐压88%,漏电流数值为0.1mA/cm2.

4H-SiC结势垒肖特基二极管电子辐照效应测试分析

采用1 MeV电子辐照,开展了4H-SiC结势垒肖特基二极管(JBS)空间电子辐照效应测试分析。测试结果表明,随着辐照电子注量的增加,JBS的正向特性逐渐退化,串联电阻逐渐增加;电子注量为5×10^(14) cm^(-2)时,反向漏电流在高反向电压下有所增加;电子注量为5×10^(15) cm^(-2)时,反向漏电流明显降低;自由载流子浓度随辐照注量的增加而降低,载流子去除率约为0.37 cm^(-1)。通过对辐照前后的SiC外延片材料级辐照缺陷分析结果表明,电子辐照会在4H-SiC中引入体缺陷,如碳间隙原子、碳空位及其他复合缺陷;在较小注量下,辐照缺陷浓度随着辐照注量的增加而增加;当辐照注量超过5×10^(14) cm^(-2)时,出现了缺陷信号的淬灭现象。

2700V 4H-SiC结势垒肖特基二极管

在76.2 mm 4H-SiC晶圆上采用厚外延技术和器件制作工艺研制的结势垒肖特基二极管(JBS)。在室温下,器件反向耐压达到2 700 V。正向开启电压为0.8 V,在V_F=2 V时正向电流密度122 A/cm^2,比导通电阻R_(on)=8.8 mΩ·cm^2。得到肖特基接触势垒qΦ_B=1.24 eV,理想因子n=1。

SiC新一代电力电子器件的进展

以SiC和GaN为代表的宽禁带半导体材料的突破给发展新一代电力电子带来希望。SiC材料具有比Si材料更高的击穿场强、更高的载流子饱和速度和更高的热导率,使SiC电力电子器件比Si的同类器件具有关断电压高、导通电阻小、开关频率高、效率高和高温性能好的特点。SiC电力电子器件将成为兆瓦电子学和绿色能源发展的重要基础之一。综述了SiC新一代电力电子器件的发展历程、现状、关键技术突破和应用研究。所评估的器件包含SiC SBD、SiC pin二极管、SiC JBS二极管、SiC MOFET、SiC IGBT、SiC GTO晶闸管、SiC JFET和SiC BJT。器件的评估重点是外延材料的结构、器件结构优化、器件性能、可靠性和应用特点。最后总结了新世纪以来SiC新一代电力电子器件的技术进步的亮点并展望了其技术未来发展的趋势。

基于结终端扩展的4H-SiC肖特基势垒二极管研制

采用高真空电子束热蒸发金属Ni分别作肖特基接触和欧姆接触,离子注入形成结终端扩展表面保护,研制出Ni/4H-SiC肖特基势垒二极管(SBD)。I-V特性测量说明,Ni/4H-SiCSBD有较好的整流特性,热电子发射是其主要的运输机理。实验测量其反向击穿电压达1800V,且反向恢复特性为32ns。

SiC功率器件辐照效应研究进展

SiC功率器件是许多航天器用电子设备的重要组成部分,是保障深空探测任务顺利进行的前提和基础。在梳理SiC功率器件发展概况的同时,针对不同SiC功率器件(SiC SBD、SiC JBS、SiC MOSFET)在空间辐射环境下的性能退化规律进行了概述,重点分析了辐射环境下SiC功率器件的损伤机理,为SiC功率器件抗辐射技术的长远发展提供了参考。