A PARALLEL SWITCH FABRIC BASED ON CROSSBAR

With the increase of link rate, the arbitrator of centralized switch fabric becomes too complicated to implement. A parallel switch fabric based on crossbar, named as PSFBC (Parallel Switch Fabric Based on Crossbar), has been proposed in this paper. PSFBC is composed of k switches whose rate is 1/k of link', these switches exchange cells in parallel; this increases the arbitrator's period and make it easy to implement. Load is evenly distributed to each switch with FCFS (First Come First Serve) rule, it can keep the order of cells in one stream. A multi-class queue scheduling policy is used in PSFBC to ensure the quality of realtime streams. Experiments show that the load on each switch in PSFBC is well balanced, its average delay of cells is little and its performance is very close to centrali{ed switch; and with the increase of number of parallel switches, the loss of PSFBC's performance keeps very small, it becomes easier to implement.

Block-free optical quantum Banyan network based on quantum state fusion and fission

Optical switch fabric plays an important role in building multiple-user optical quantum communication networks.Owing to its self-routing property and low complexity, a banyan network is widely used for building switch fabric. While,there is no efficient way to remove internal blocking in a banyan network in a classical way, quantum state fusion, by which the two-dimensional internal quantum states of two photons could be combined into a four-dimensional internal state of a single photon, makes it possible to solve this problem. In this paper, we convert the output mode of quantum state fusion from spatial-polarization mode into time-polarization mode. By combining modified quantum state fusion and quantum state fission with quantum Fredkin gate, we propose a practical scheme to build an optical quantum switch unit which is block free. The scheme can be extended to building more complex units, four of which are shown in this paper.

4×4 nonblocking optical switch fabric based on cascaded multimode interferometers

We experimentally demonstrate a 4 × 4 nonblocking silicon thermo-optic(TO) switch fabric consisting of three stages of tunable generalized Mach–Zehnder interferometers. All 24 routing states for nonblocking switching are characterized. The device's footprint is 4.6 mm × 1.0 mm. Measurements show that the worst cross talk of all switching states is-7.2 dB. The on-chip insertion loss is in the range of 3.7–13.1 dB. The average TO switching power consumption is 104.8 mW.

Design and Implementation of a Fast Switch Fabric

To solve the bottleneck issue of high-speed routers and switch fabrics technology for current networks, this paper provides a detailed description of how to implement a shared-memory switch fabric for packet routers by Xilinx FPGAs. The switch fabric, coined SL64, has the notable features as follows: (1) Supporting up to 16 OC-48 line cards; (2) Guaranteeing data lossless through robust flow control; (3) Supporting up to eight priorities with one strict priority; (4) Guaranteeing QoS, high throughput and starvation free through scheduling algorithm WF2Q+; (5) Provideing programmable cell length-64 bytes, 72 bytes and 80 bytes are all available for various applications.In addition, common features such as multicast support, protocol agnostic cell based switch, CRC check for cell header and embedded shared memory are also included in our switch fabric SL64.

Performance of ATMS witch Based on Bifurcated Output Queuing

A novel ATM switch fabric with bifurcated queuing is introduced. It can substantially decrease the speed requirement of both memory and bus of ATM switching systems while maintaining high throughput of basic output queuing.

Research on Next-Generation Scalable Routers Implemented with H-Torus Topology

The exponential growth of user traffic has been driving routers to run at higher capacity. In a traditional router, the centralized switching fabric is becoming the bottleneck for its limited number of ports and complicated scheduling algorithms. Direct networks, such as 3-D Torus topology, have been successfully applied to the design of scalable routers. They show good scalability and fault tolerance. Unfortunately, its scalability is limited in practice. In this paper, we introduce another type of direct network, called H-Torus. This network shows excellent topological properties. On its basis, the designs of line card and routing algorithms are introduced. Extensive simulations show that the routing algorithm is very important in such a system and results in low latency with high throughput.