Simulation realization of skip cycle mode integrated control circuit in the switching power supply with low standby loss

This paper explores and proposes a design solution of an integrated skip cycle mode （SCM） control circuit with a simple structure. The design is simulated and implemented with XD10H-1.0μm modular DIMOS 650 V process. In order to meet the requirement of a wide temperature range and high yields of products, the schematic extracted from the layout is simulated with five process corners at 27℃ and 90℃. Simulation results demonstrate that the proposed integrated circuit is immune to noise and achieves skipping cycle control when switching mode power supply （SMPS） works with low load or without load.

The Switching Fractional Order Chaotic System and Its Application to Image Encryption

Many studies on fractional order chaotic systems and secure communications have been carried out, however, switching fractional order chaotic system and its application to image encryption have not been explored yet. In this paper, a new switching fractional order chaotic system is proposed, containing fractional order Chen system and the other two fractional order chaotic systems. Chaotic attractors and dynamical analysis including Lyapunov exponent, bifurcation diagram, fractal dimension, dissipation, stability and symmetry are shown firstly. After that, some circuit simulations through Multisim are presented. By controlling switch k U+2082 and k U+2083, switching among the three fractional order chaotic subsystems can be realized. Finally, we apply the switching fractional order chaotic system to image encryption using exclusive or U+0028 XOR U+0029 encryption algorithm. The encryption scheme could increase randomness and improve speed of encryption. © 2017 Chinese Association of Automation.

Research on Switching Characteristics Based on Optimization Design of SiC MOSFET Drive Circuit

With the increasing emphasis on energy conservation,emission reduction and environmental protection,the application prospect of SiC power devices is becoming more and more broad.In the high frequency application of SiC MOSFET,the change rate of voltage and current in the turn-on and turn-off process increases with the increase of switching frequency.Also,the current and voltage spike oscillation phenomenon is gradually intensified due to the influence of circuit stray parameters.Based on the analysis of SiC MOSFET characteristics,the paper discusses the design requirements and design principles of SiC MOSFET drive circuit.Then,taking the SiC module C2M0080120D of Cree Company as an example,a driver circuit design is realized through the ACPL-355JC optocoupler driver module of Broadcom Company.The circuit not only has the characteristics of fast transmission delay and excellent performance,but also has the functions of overload and short circuit protection.The driving circuit is verified by LTspice simulation software,and the switching characteristics of SiC MOSFET under different working conditions are studied in depth.The experimental results show that the driving circuit can improve the switching time of SiC MOSFET and effectively solve the problem of current and voltage spike oscillation,which lays a foundation for the practical application of SiC MOSFET in the future.

Low switching loss and increased short-circuit capability split-gate SiC trench MOSFET with p-type pillar

A split-gate SiC trench gate MOSFET with stepped thick oxide, source-connected split-gate(SG), and p-type pillar(ppillar) surrounded thick oxide shielding region(GSDP-TMOS) is investigated by Silvaco TCAD simulations. The sourceconnected SG region and p-pillar shielding region are introduced to form an effective two-level shielding, which reduces the specific gate–drain charge(Q_(gd,sp)) and the saturation current, thus reducing the switching loss and increasing the short-circuit capability. The thick oxide that surrounds a p-pillar shielding region efficiently protects gate oxide from being damaged by peaked electric field, thereby increasing the breakdown voltage(BV). Additionally, because of the high concentration in the n-type drift region, the electrons diffuse rapidly and the specific on-resistance(Ron,sp) becomes smaller.In the end, comparing with the bottom p~+ shielded trench MOSFET(GP-TMOS), the Baliga figure of merit(BFOM,BV~2/R_(on,sp)) is increased by 169.6%, and the high-frequency figure of merit(HF-FOM, R_(on,sp) × Q_(gd,sp)) is improved by310%, respectively.

A General Method in the Synthesis of Ternary Double Pass-Transistor Circuits

A general method for designing ternary circuits using double pass-transistor logic is investigated. The logical relation of each MOS transistor is formulated by using the transmission operation in order to make effective and practical use of the circuits. A way to generate ternary complementary and dual circuits by applying the complementarity and duality principles is presented. This new static ternary double pass-transistor logic scheme has some favorable properties：the use of standard CMOS process without any modification of the thresholds, a perfectly symmetrical structure,a full logic swing, the maximum possible noise margins, a less complex structure, and no static power consumption. HSPICE simulations using TSMC 0.25μm CMOS technology and a 3V power supply demonstrate the effectiveness of the proposed design.

Nonlinear Auto-Companding Method for Behavioral Modeling of Switched-Current Circuits

A wavelet collocation method with nonlinear auto companding is proposed for behavioral modeling of switched current circuits.The companding function is automatically constructed according to the initial error distribution obtained through approximating the input output function of the SI circuit by conventional wavelet collocation method.In practical applications,the proposed method is a general purpose approach,by which both the small signal effect and the large signal effect are modeled in a unified formulation to ease the process of modeling and simulation.Compared with the published modeling approaches,the proposed nonlinear auto companding method works more efficiently not only in controlling the error distribution but also in reducing the modeling errors.To demonstrate the promising features of the proposed method,several SI circuits are employed as examples to be modeled and simulated.

Research and Progress of Service Driven Optical Switching Network in China

National R&D activities on optical switching networkare introduced. Optical switching network testbedswere established in China including 3T-net andOBS ring and mesh network test-bed with the supportof national '863' program. As an importantmodule in OPS network, a novel all-optical serialmulticast mode is discussed.

A Novel Crowbar Impulse Current Circuit for Testing the Switch-Type SPD

A crowbar impulse current circuit for testing the switch-type surge protective device （SPD） is presented. The crowbar circuit consists of a computer control circuit, a trigger voltage pulse generator, a main discharging switch, and a crowbar pseudospark switch. The active trigger technology was studied in the crowbar impulse current circuit. The circuit monitors the main discharging current and generates a trigger signal at a proper time for the crowbar pseudospark switch operation. The trigger characteristics of the main discharge switch and the crowbar pseu- dospark switch were investigated. By monitoring the preset applied capacitor voltage, the gap distance of the main discharging switch could be adjusted to ensure a discharging delay time less than 2 μs. Equipped with a surface ttashover trigger device made of high relative perimittivity dielectric material BaTiO3 （εr = 3460）, the discharge delay time of the crowbar pseudospark switch is less than 85 ns, and the minimum operating voltage is less than 1% of its self-breakdown voltage. With a storage capacitor of 9 μF , an inductor of 18 μH and a crowbar pseudospark switch, a load of 30 mΩ and an applied capacitor voltage of 40 kV, an impulse current waveform of maximum 25 kA was generated with a rise time and time to half peak value of 17.2 μs and 336μs respectively.

DESIGN OF TERNARY CURRENT-MODE CMOS CIRCUITS BASED ON SWITCH-SIGNAL THEORY

By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.

DESIGN OF nMOS QUATERNARY FLIP-FLOPS AND THEIR APPLICATIONS

By using the theory of clipping voltage-switches, two kinds of master/slave nMOS quaternary flip-flops are designed. These flip-flops have the capability of two-input presetting and double-rail complementary outputs. It is shown that these flip-flops are effectively suitable to design nMOS quaternary sequential circuits by designing two examples of hexadecimal up-counter and decimal up-counter.

Analysis and modeling of resistive switching mechanism oriented to fault tolerance of resistive memory based on memristor

With the progress of the semiconductor industry, resistive memories, especially the memristor, have drawn increasing attention. The resistive memory based on memrsitor has not been commercialized mainly because of data error. Currently, there are more studies focused on fault tolerance of resistive memory. This paper studies the resistive switching mechanism which may have time-varying characteristics. Resistive switching mechanism is analyzed and its respective circuit model is established based on the memristor Spice model.

Analysis and modeling of resistive switching mechanisms oriented to resistive random-access memory

With the progress of the semiconductor industry,the resistive random-access memory（RAM） has drawn increasing attention.The discovery of the memristor has brought much attention to this study.Research has focused on the resistive switching characteristics of different materials and the analysis of resistive switching mechanisms.We discuss the resistive switching mechanisms of different materials in this paper and analyze the differences of those mechanisms from the view point of circuitry to establish their respective circuit models.Finally,simulations are presented.We give the prospect of using different materials in resistive RAM on account of their resistive switching mechanisms,which are applied to explain their resistive switchings.

Investigation of a CO2 Switching Arc Using Spectroscopic Diagnostics and Computational Fluid Dynamics Simulations

A deep understanding of the physical processes coming along with the current interruption in high voltage circuit breakers is essential for the optimization of today’s switching technologies.Therefore a switching arc in a model circuit breaker is studied by means of computational fluid dynamics(CFD)simulations and optical emission spectroscopy(OES)in this contribution.Experimental investigations are performed in carbon dioxide(CO2)at absolute filling pressures of 0.1 and 0.5 MPa.CFD simulations are carried out based on a model of the arcing zone including a consistent treatment of the radiation transport and the wall ablation.Carbon ion line radiation is analysed in the experiment using an optical path in the heating channel between the electrodes inside the nozzle system.The pressure value in the arc is estimated based on the line width-intensity dependence.Obtained values correspond to the measured pressure outside the arc.For the temperature profiles,a good agreement within the accuracy of the approaches is observed between the CFD simulations and the results of OES.

SWITCHING CHARACTERISTICS AND ANALYSIS OF RESONANT TUNNELING DIODES

Resonant tunneling diode （RTD） of AlAs/InGaAs/AlAs double barrier-single well structure was designed and fabricated. The devices showed current-voltage characteristics with peak-valley current ratio of 4 ： 1 at room temperature. The scattering parameter of RTD was measured by using an HP8510（C） network analyzer. Equivalent circuit parameters were obtained by curve fitting and optimized. The RTD switching time was estimated using the measured capacitance and average negative differential resistance. The minimum rise time of the sample was estimated to be 21 ps.

Circuit-level simulation of the hysteresis inversion frequency of the ferroelectric liquid crystals

The V-shaped electro-optical properties control is investigated by an equivalent circuit model.Simu-lation results show that genuine V-shaped form is only observed at hysteresis inversion frequency,and be-low and above this frequency an anomalous and normal hysteresis are observed.And the inversion fre-quency decreases with the resistance of ferroelectric liquid crystal(FLC)layer following logf_i=-alogR_(LC)+b .The results are in good accordance with the reported experimental results.

A Very Low Level dc Current Amplifier Using SC Circuit: Effects of Parasitic Capacitances and Duty Ratio on Its Output

This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.

Analysis on the Irregular and Asymmetrical Power/Ground Structure by PEEC Modeling

In order to provide some reference for the design of the power/ground system, a complicated power/ground system in time and frequency domains was analyzed, which is based on PEEC (Partial Element Equivalent Circuit). According to the actual requirements, characteristics of some common power/ground structures in time and frequency domains, such as SSN (Simultaneous Switching Noise), are obtained for the future research. The results show the first resonance point is changed with the structure of the power/ground networks.

Optimizing the Stage Resolution of a 10-Bit, 50 Ms/Sec Pipelined A/D Converter &Its Impact on Speed, Power, Area, and Linearity

At high speeds and high resolution, the Pipeline ADCs are becoming popular. The options of different stage resolutions in Pipelined ADCs and their effect on speed, power dissipation, linearity and area are discussed in this paper. The basic building blocks viz. Op-Amp Sample and Hold circuit, sub converter, D/A Converter and residue amplifier used in every stage is assumed to be identical. The sub converters are implemented using flash architectures. The paper implements a 10-bit 50 Mega Samples/Sec Pipelined A/D Converter using 1, 1.5, 2, 3, 4 and 5 bits/stage conversion techniques and discusses about its impact on speed, power, area, and linearity. The design implementation uses 0.18 μm CMOS technology and a 3.3 V power supply. The paper concludes stating that a resolution of 2 bits/stage is optimum for a Pipelined ADC and to reduce the design complexity, we may go up to 3 bits/stage.

Discrete-Time Chaotic Circuits for Implementation of Tent Map and Bernoulli Map

Discrete-time chaotic circuit implementations of a tent map and a Bernoulli map using switched-current （SI） techniques are presented. The two circuits can be constructed with 16 MOSFET＇s and 2 capacitors. The simulations and experiments built with commercially available IC＇s for the circuits have demonstrated the validity of the circuit designs. The experiment results also indicate that the proposed circuits are integrable by a standard CMOS technology. The implementations are useful for studies and applications of chaos.