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Optimization design of multiphase pump impeller based on combined genetic algorithm and boundary vortex flux diagnosis 被引量:8
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作者 张金亚 蔡淑杰 +2 位作者 李泳江 周鑫 张永学 《Journal of Hydrodynamics》 SCIE EI CSCD 2017年第6期1023-1034,共12页
A novel optimization design method for the multiphase pump impeller is proposed through combining the quasi-3D hydraulic design(Q3DHD), the boundary vortex flux(BVF) diagnosis, and the genetic algorithm(GA). The... A novel optimization design method for the multiphase pump impeller is proposed through combining the quasi-3D hydraulic design(Q3DHD), the boundary vortex flux(BVF) diagnosis, and the genetic algorithm(GA). The BVF diagnosis based on the Q3DHD is used to evaluate the objection function. Numerical simulations and hydraulic performance tests are carried out to compare the impeller designed only by the Q3DHD method and that optimized by the presented method. The comparisons of both the flow fields simulated under the same condition show that(1) the pressure distribution in the optimized impeller is more reasonable and the gas-liquid separation is more efficiently inhibited,(2) the scales of the gas pocket and the vortex decrease remarkably for the optimized impeller,(3) the unevenness of the BVF distributions near the shroud of the original impeller is effectively eliminated in the optimized impeller. The experimental results show that the differential pressure and the maximum efficiency of the optimized impeller are increased by 4% and 2.5%, respectively. Overall, the study indicates that the optimization design method proposed in this paper is feasible. 展开更多
关键词 Optimization design multiphase pump genetic algorithm boundary vortex flux quasi-3d hydraulic design (Q3dHd
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An efficient method for comprehensive modeling and parasitic extraction of cylindrical through-silicon vias in 3D ICs 被引量:1
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作者 姚蔷 叶佐昌 喻文健 《Journal of Semiconductors》 EI CAS CSCD 2015年第8期150-156,共7页
To build an accurate electric model for through-silicon vias (TSVs) in 3D integrated circuits (ICs), a resistance and capacitance (RC) circuit model and related efficient extraction technique are proposed. The c... To build an accurate electric model for through-silicon vias (TSVs) in 3D integrated circuits (ICs), a resistance and capacitance (RC) circuit model and related efficient extraction technique are proposed. The circuit model takes both semiconductor and electrostatic effects into account, and is valid for low and medium signal frequencies. The electrostatic capacitances are extracted with a floating random walk based algorithm, and are then combined with the voltage-dependent semiconductor capacitances to form the equivalent circuit. Compared with the method used in Synopsys's Sdevice, which completely simulates the electro/semiconductor effects, the proposed method is more efficient and is able to handle the general TSV layout as well. For several TSV structures, the experimental results validate the accuracy of the proposed method for the frequency range from l0 kHz to 1 GHz. The proposed method demonstrated 47× speedup over the Sdevice for the largest 9-TSV case. 展开更多
关键词 3d ic through silicon via (TSV) parasitic extraction floating random walk algorithm metal-oxide- semiconductor (MOS) capacitance
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