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Noise analysis and measurement of time delay and integration charge coupled device 被引量:4
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作者 王德江 张涛 《Chinese Physics B》 SCIE EI CAS CSCD 2011年第8期348-353,共6页
Time delay and integration (TDI) charge coupled device (CCD) noise sets a fundamental limit on image sensor performance, especially under low illumination in remote sensing applications. After introducing the comp... Time delay and integration (TDI) charge coupled device (CCD) noise sets a fundamental limit on image sensor performance, especially under low illumination in remote sensing applications. After introducing the complete sources of CCD noise, we study the effects of TDI operation mode on noise, and the relationship between different types of noise and number of the TDI stage. Then we propose a new technique to identify and measure sources of TDI CCD noise employing mathematical statistics theory, where theoretical analysis shows that noise estimated formulation converges well. Finally, we establish a testing platform to carry out experiments, and a standard TDI CCD is calibrated by using the proposed method. The experimental results show that the noise analysis and measurement methods presented in this paper are useful for modeling TDI CCDs. 展开更多
关键词 time delay and integration charge coupled device noise measurement remote sensingapplication
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Design and implementation of high speed TDI CCD timing-driven circuits
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作者 李波 徐正平 +2 位作者 李军 黄厚田 王德江 《Journal of Measurement Science and Instrumentation》 CAS 2012年第2期185-190,共6页
The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.... The time delay integration charge coupled device(TDI CCD)is the key component in remote sensing systems.The paper analyzes the structure and the working principles of the device according to a customized TDI CCD chip.Employing the special clock resources and large-scale phase locked logic(PLL)in field-programmable gate arrays(FPGA),a timing-driven approach is proposed,using which all timing signals including reset gate,horizontal and vertical timing signals,are implemented in one chip.This not only reduces printed circuit board(PCB)space,but also enhances the portability of the system.By studying and calculating CCD parameters thoroughly,load capacity and power consumption,package,etc,are compared between various candidates chips,and detailed comparison results are also listed in table.Experimental results show that clock generator and driving circuit satisfy the requirements of high speed TDI CCD. 展开更多
关键词 time delay integration charge coupled device(TDI CCD) timing-driven circuit field-programmable gate arrays(FPGA)
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