Design of Diode Type Un-Cooled Infrared Focal Plane Array Readout Circuit

The diode infrared focal plane array uses the silicon diodes as a sensitive device for infrared signal measurement. By the infrared radiation, the infrared focal plane can produces small voltage signals. For the traditional readout circuit structures are designed to process current signals, they cannot be applied to it. In this paper, a new readout circuit for the diode un-cooled infrared focal plane array is developed. The principle of detector array signal readout and small signal amplification is given in detail. The readout circuit is designed and simulated by using the Central Semiconductor Manufacturing Corporation （CSMC） 0.5 μm complementary metal-oxide-semiconductor transistor （CMOS） technology library. Cadence Spectre simulation results show that the scheme can be applied to the CMOS readout integrated circuit （ROIC） with a larger array, such as 320×240 size array.

Fully On-Chip Integrated Photodetector Front-End Dedicated to Real-Time Portable Optical Brain Imaging

Optical brain imaging using functional near infra-red spectroscopy (fNIRS) offers a portable and noninvasive tool for monitoring of blood oxygenation. In this paper we have introduced a new miniaturized photodetector front-end on achip to be applied in a portable fNIRS system. It includes silicon avalanche photodiodes (SiAPD), Transimpedance amplifier (TIA) front-end and Quench-Reset circuitry to operate in both linear and Geiger modes. So it can be applied for both continuous-wave fNIRS (CW-fNIRS) and also single-photon counting. Proposed SiAPD exhibits high-avalanche gain (>100), low-breakdown voltage ( V) and high photon detection efficiency accompanying with low dark count rates. The proposed TIA front-end offer a low power consumption ( mW), high-transimpedance gain (up to 250 MV/A), tunable bandwidth (1 kHz - 1 GHz) and very low input and output noise (~few fA/√Hz and few μV/√Hz). The Geiger-mode photon counting front-end also exhibits a controllable hold-off and rest time with an ultra fast quench-reset time (few ns). This integrated system has been implemented using submicron (0.35 μm) standard CMOS technology.

A reconfigurable CBP/LP active RC filter with noise-shaping technique for wireless receivers

A reconfigurable complex band-pass （CBP）/low-pass （LP） active-RC filter with a noise-shaping technique for wireless receivers is presented. Its bandwidth is reconfigurable among 500 kHz, 1 MHz and 4 MHz in LP mode and 1 MHz, 2 MHz and 8 MHz in CBP mode with 3 MHz center frequency. The Op-Amps used in the filter are realized in cell arrays in order to obtain scalable power consumption among the different operation modes. Furthermore, the filter can be configured into the 1st order, 2nd order or 3rd order mode, thus achieving a flexible filtering property. The noise-shaping technique is introduced to suppress the flicker noise contribution. The filter has been implemented in 180 nm CMOS and consumes less than 3 mA in the 3rd 8 MHz-bandwidth CBP mode. The spot noise at 100 Hz can be reduced by 14.4 dB at most with the introduced noise-shaping technique.