The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improv...The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.展开更多
A field-programmable gate array(FPGA)based high-speed broadband data acquisition system is designed.The system has a dual channel simultaneous acquisition function.The maximum sampling rate is 500 MSa/s and bandwidth ...A field-programmable gate array(FPGA)based high-speed broadband data acquisition system is designed.The system has a dual channel simultaneous acquisition function.The maximum sampling rate is 500 MSa/s and bandwidth is200 MHz,which solves the large bandwidth,high-speed signal acquisition and processing problems.At present,the data acquisition system is successfully used in broadband receiver test systems.展开更多
The device is used for the test on the fuze detonating time according to the initial velocity of the projectile and the altitude and speed of enemy aircraft flight. For the special requirements of the high-speed signa...The device is used for the test on the fuze detonating time according to the initial velocity of the projectile and the altitude and speed of enemy aircraft flight. For the special requirements of the high-speed signal acquisition in the process, the characteristics of the measured signal are analyzed. The system is investigated in chip selection, signal transmission, signal processing, signal storage, post-production PCB design, etc. The appropriate measures and solutions which affect the integrity and accuracy of the signal in each process are proposed. The rules for the layout of the device and wiring are made. The result show that the measurement values are accurate without loss of data.展开更多
This paper discusses the chief techniques and design principles of an ultra-high speed and dual-channel data acquisition card based on PXI bus, using FPGA (Field Programmable Gate Array) as logic controller cell. The ...This paper discusses the chief techniques and design principles of an ultra-high speed and dual-channel data acquisition card based on PXI bus, using FPGA (Field Programmable Gate Array) as logic controller cell. The instmment consists of pre-pro- cess circuit, A/D converter, SDRAM (Synchronous Dynamic random access memory), and control circuit integrated in FPGA. It can achieve allowing up to 1000MHz real-time sampling rate. The test result indicates that the system works normally and the system design is successful.展开更多
With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists o...With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits （ENOB） is more than 6.5 bits.展开更多
The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect ...The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect （PCI） bus and field programmable gate array （FPGA） for sampling electromagnetic radiation caused by video signal. The hardware design and controlling flow of each module are introduced in detail. The sampling rate can reach 64 Msps and system transfers speed can be up to 128 Mb/s by using time interleaving, which increases the overall sampling speed of a system by operating two data converters in parallel.展开更多
采用TI公司的54系列MCU最新型号MSP430F5438为终端控制核心,通过SHT10和MQ-2传感器采集环境中的温度、湿度、烟雾可燃气体参数,并用GPS定位监测点,以SIM300无线传输将数据及定位坐标发回控制中心的上位机以分析。上位机软件采用C++Buil...采用TI公司的54系列MCU最新型号MSP430F5438为终端控制核心,通过SHT10和MQ-2传感器采集环境中的温度、湿度、烟雾可燃气体参数,并用GPS定位监测点,以SIM300无线传输将数据及定位坐标发回控制中心的上位机以分析。上位机软件采用C++Builder配合SQL Server 2000编写,对采集的数据进行实时处理分析,并用跟踪曲线斜率的算法做出预警。由于利用该MCU特有的多种低功耗模式及外设与CPU独立工作的特性,终端的电力持续时间大大增加。展开更多
本文介绍了一种基于超高速数据采集技术的高精度时间间隔测量系统的设计。基于对高精度时间测量应用背景下,时间-数字转换器(Ti me-to-digital Converter,TDC)与数字信号中和器(Digital Signal Averager)优缺点的对比,本文并提出了一种...本文介绍了一种基于超高速数据采集技术的高精度时间间隔测量系统的设计。基于对高精度时间测量应用背景下,时间-数字转换器(Ti me-to-digital Converter,TDC)与数字信号中和器(Digital Signal Averager)优缺点的对比,本文并提出了一种高精度数字信号中和器的设计方案。完成了前端信号调理、超高速数据采集、高速时钟产生、FPGA硬件算法设计、USB2.0接口等模块设计。测试结果表明本系统最小时间分辨率334ps,测量范围0～20us,可广泛应用于高精度时间间隔测量领域。展开更多
文摘The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.
文摘A field-programmable gate array(FPGA)based high-speed broadband data acquisition system is designed.The system has a dual channel simultaneous acquisition function.The maximum sampling rate is 500 MSa/s and bandwidth is200 MHz,which solves the large bandwidth,high-speed signal acquisition and processing problems.At present,the data acquisition system is successfully used in broadband receiver test systems.
文摘The device is used for the test on the fuze detonating time according to the initial velocity of the projectile and the altitude and speed of enemy aircraft flight. For the special requirements of the high-speed signal acquisition in the process, the characteristics of the measured signal are analyzed. The system is investigated in chip selection, signal transmission, signal processing, signal storage, post-production PCB design, etc. The appropriate measures and solutions which affect the integrity and accuracy of the signal in each process are proposed. The rules for the layout of the device and wiring are made. The result show that the measurement values are accurate without loss of data.
文摘This paper discusses the chief techniques and design principles of an ultra-high speed and dual-channel data acquisition card based on PXI bus, using FPGA (Field Programmable Gate Array) as logic controller cell. The instmment consists of pre-pro- cess circuit, A/D converter, SDRAM (Synchronous Dynamic random access memory), and control circuit integrated in FPGA. It can achieve allowing up to 1000MHz real-time sampling rate. The test result indicates that the system works normally and the system design is successful.
文摘With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits （ENOB） is more than 6.5 bits.
基金the National Natural Science Foundation of China （60331010, 60271018）.
文摘The electromagnetic radiation will result in informa- tion leakage being recovered when computers work. This article presents a high-speed real-time data acquisition system based on peripheral component interconnect （PCI） bus and field programmable gate array （FPGA） for sampling electromagnetic radiation caused by video signal. The hardware design and controlling flow of each module are introduced in detail. The sampling rate can reach 64 Msps and system transfers speed can be up to 128 Mb/s by using time interleaving, which increases the overall sampling speed of a system by operating two data converters in parallel.
文摘采用TI公司的54系列MCU最新型号MSP430F5438为终端控制核心,通过SHT10和MQ-2传感器采集环境中的温度、湿度、烟雾可燃气体参数,并用GPS定位监测点,以SIM300无线传输将数据及定位坐标发回控制中心的上位机以分析。上位机软件采用C++Builder配合SQL Server 2000编写,对采集的数据进行实时处理分析,并用跟踪曲线斜率的算法做出预警。由于利用该MCU特有的多种低功耗模式及外设与CPU独立工作的特性,终端的电力持续时间大大增加。
文摘本文介绍了一种基于超高速数据采集技术的高精度时间间隔测量系统的设计。基于对高精度时间测量应用背景下,时间-数字转换器(Ti me-to-digital Converter,TDC)与数字信号中和器(Digital Signal Averager)优缺点的对比,本文并提出了一种高精度数字信号中和器的设计方案。完成了前端信号调理、超高速数据采集、高速时钟产生、FPGA硬件算法设计、USB2.0接口等模块设计。测试结果表明本系统最小时间分辨率334ps,测量范围0～20us,可广泛应用于高精度时间间隔测量领域。
