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A STUDY OF SILICON AVALANCHE COLD MICRO-CATHODE USING ULTRA-SHALLOW PN+ JUNCTION
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作者 Li Qiong, Tang Shihao, Yaun Meiying, Xue Zheng, Xu Jingang Department of Electronics Science and Technology East China Normal University, Shanghai 200062 China Lin ChengluShanghai Institute of Metallurgy, Academia Sinica Chang Ning Road 865, Shanghai 200050 China Zhang Duan Wu Junlei Shanghai Vacuum Electrical Device Ltd. Jiao Zhou Road 485, Shanghai 200040 China 《真空科学与技术学报》 EI CAS CSCD 1992年第Z1期239-242,共4页
The structure, fabrication and emission characteristics of a silicon cold micro-cathode using ultra-shallow PN+ junction are presented. Implantation of As+ with a energy around 12 kev, rapid thermal annealing combined... The structure, fabrication and emission characteristics of a silicon cold micro-cathode using ultra-shallow PN+ junction are presented. Implantation of As+ with a energy around 12 kev, rapid thermal annealing combined with argon sputtering are used for forming ultra-shallow pn+ junction, whose depth is lower than 30nm. In a vacuum system Ⅰ-Ⅴcharacteristics were measured. The stability problem which was found in the devices testing is also discussed in this paper. 展开更多
关键词 junction A STUDY OF SILICON AVALANCHE COLD MICRO-CATHODE USING ultra-shallow PN
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激光在集成电路纳米超浅结形成中的应用综述 被引量:1
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作者 王光伟 宋延民 +1 位作者 张建民 郑宏兴 《天津工程师范学院学报》 2006年第3期19-23,共5页
综述了近年来激光在集成电路纳米超浅结形成中的应用。指出了现有的广泛用于集成电路结形成的离子注入加快热退火技术,不能适应纳米超浅源、漏结的制备及其原因,分析了激光的独特优点以及用于超浅结形成的可行性。纳米超浅结要求结深和... 综述了近年来激光在集成电路纳米超浅结形成中的应用。指出了现有的广泛用于集成电路结形成的离子注入加快热退火技术,不能适应纳米超浅源、漏结的制备及其原因,分析了激光的独特优点以及用于超浅结形成的可行性。纳米超浅结要求结深和杂质分布精确可控,结电阻要尽可能低。着重强调了激光能量密度、脉冲宽度、作用时间等工艺参数与结深、杂质分布以及结电阻之间的密切关联。 展开更多
关键词 激光退火 激光掺杂 集成电路 纳米尺度 超浅结
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深亚微米IC超浅结的SIMS表征
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作者 瞿欣 王家楫 《质谱学报》 EI CAS CSCD 2005年第z1期13-14,共2页
Secondary ion mass spectrometry (SIMS) is a standard technique for characterization of dopant distribution in semiconductor industry. In the ultra-shallow junction (USJ) application, the interested depth scale was ext... Secondary ion mass spectrometry (SIMS) is a standard technique for characterization of dopant distribution in semiconductor industry. In the ultra-shallow junction (USJ) application, the interested depth scale was extended into the surface transient area of SIMS. There is several improved approach reviewed in this paper that can meet the requirements for the USJ characterization. Sputtering with a low energy primary ion beam incident at a large angle respect to the simple surface normal can effectively minimize the depth of the surface transient area, as well as the length of the profile tail. Oxygen leak can reduce the transient ion yield change, but induces lower depth resolution. Quadrupole SIMS can be used in B profile. As and P profiles, however, need magnetic analyzer with higher mass resolution. 展开更多
关键词 SIMS ultra-shallow junction LOW-ENERGY ion IMPLANT
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Optical and photo-carrier characterization of ultra-shallow junctions in silicon 被引量:2
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作者 HUANG QiuPing LI BinCheng REN ShengDong 《Science China(Physics,Mechanics & Astronomy)》 SCIE EI CAS 2013年第7期1294-1300,共7页
Spectroscopic ellipsometry (SE), photocarrier radiometry (PCR) and photoluminescence (PL) techniques were employed to measure the ultra-shallow junction (USJ) wafers. These USJ wafers were prepared by As+ ion implanta... Spectroscopic ellipsometry (SE), photocarrier radiometry (PCR) and photoluminescence (PL) techniques were employed to measure the ultra-shallow junction (USJ) wafers. These USJ wafers were prepared by As+ ion implantation at energies of 0.5-5 keV, at a dose of 1×1015 As+ /cm 2 and spike annealing. Experimentally the damaged layer of the as-implanted wafer and the recrystallization and activation of the post-annealed wafer were evaluated by SE in the spectral range from 0.27 to 20 m. The PCR amplitude decreased monotonically with the increasing implantation energy. The experimental results also showed that the PCR amplitudes of post-annealed USJ wafers were greatly enhanced, compared to the non-implanted and non-annealed substrate wafer. The PL measurements showed the enhanced PCR signals were attributed to the band-edge emissions of silicon. For explaining the PL enhancement, the electronic transport properties of USJ wafers were extracted via multi-wavelength PCR experiment and fitting. The fitted results showed the decreasing surface recombination velocity and the decreasing diffusion coefficient of the implanted layer contributed to the PCR signal enhancement with the decreasing implantation energy. SE, PCR and PL were proven to be non-destructive metrology tools for characterizing ultra-shallow junctions. 展开更多
关键词 photocarrier radiometry spectroscopic ellipsometry PHOTOLUMINESCENCE ultra-shallow junctions SILICON
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Design of a high-performance PJFET for the input stage of an integrated operational amplifier
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作者 税国华 唐昭焕 +4 位作者 王志宽 欧红旗 杨永晖 刘勇 王学毅 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2010年第1期34-38,共5页
With Shockley's approximate-channel theory and TCAD tools, a high-voltage, ultra-shallow junction PJFET for the input stage of an integrated operational amplifier (OPA) was realized. The high-performance PJFET devi... With Shockley's approximate-channel theory and TCAD tools, a high-voltage, ultra-shallow junction PJFET for the input stage of an integrated operational amplifier (OPA) was realized. The high-performance PJFET device was developed in the Bi-FET process technology. The measured specifications are as follows. The top-gate junction depth is about 0.1 μm, the gate-leakage current is less than 5 pA, the breakdown voltage is more than 80 V, and the pinch-off voltage is optional between 0.8 and 2.0 V. The device and its Bi-FET process technology were used to design and process a high input-impedance integrated OPA. The measured results show that the OPA has a bias current of less than 50 pA, voltage noise of less than 50 nV/Hz^1/2, and current noise of less than 0.05 pA/Hz^1/2. 展开更多
关键词 PJFET operational amplifier Bi-FET process ultra-shallow junction high input-impedance
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