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Design of Second Order Sliding Mode and Sliding Mode Algorithms:A Practical Insight to DC-DC Buck Converter 被引量:2
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作者 Seyed Mehdi RakhtAla Monazzahalsadat Yasoubi Hassan HosseinNia 《IEEE/CAA Journal of Automatica Sinica》 SCIE EI CSCD 2017年第3期483-497,共15页
This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to c... This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to control buck switch mode converter.The idea behind this strategy is to suppress chattering and maintain robustness and finite time convergence properties of the output voltage error to the equilibrium point under the load variations and parametric uncertainties.In addition,the influence of the twisting algorithm on the performance of closed-loop system is investigated and compared with other algorithms of first order sliding mode control such as adaptive sliding mode control(ASMC),nonsingular terminal sliding mode control(NTSMC).In comparative evaluation,the transient response of the output voltage with the step change in the load and the start-up response of the output voltage with the step change in the input voltage of buck converter were compared.Experimental results were obtained from a hardware setup constructed in laboratory.Finally,for all of the surveyed control methods,the theoretical considerations,numerical simulations,and experimental measurements from a laboratory prototype are compared for different operating points.It is shown that the proposed twisting method presents an improvement in steady state error and settling time of output voltage during load changes. 展开更多
关键词 dc-dc buck converter non-singular-terminal sliding mode second order sliding mode twisting algorithm
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Study of Sliding Mode Control of DC-DC Buck Converter 被引量:2
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作者 Hanifi Guldemir 《Energy and Power Engineering》 2011年第4期401-406,共6页
In this paper, a robust sliding mode controller for the control of dc-dc buck converter is designed and analyzed. Dynamic equations describing the buck converter are derived and sliding mode controller is designed. A ... In this paper, a robust sliding mode controller for the control of dc-dc buck converter is designed and analyzed. Dynamic equations describing the buck converter are derived and sliding mode controller is designed. A two-loop control is employed for a buck converter. The robustness of the sliding mode controlled buck converter system is tested for step load changes and input voltage variations. The theoretical predictions are validated by means of simulations. Matlab/Simulink is used for the simulations. The simulation results are presented. The buck converter is tested with operating point changes and parameter uncertainties. Fast dynamic response of the output voltage and robustness to load and input voltage variations are obtained. 展开更多
关键词 Switched-Mode Power Supplies buck converter dc-dc converter SLIDING MODE Control
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准单级单向Buck直流变换器型高频链并网逆变器 被引量:3
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作者 陈道炼 严斌 +2 位作者 陈峰 左巧安 林真 《电机与控制学报》 EI CSCD 北大核心 2012年第12期54-60,共7页
提出准单级单向Buck直流变换器型高频链并网逆变器电路结构与拓扑族。其电路结构是由单向隔离Buck直流变换器和极性反转逆变桥级联构成;其拓扑族包括推挽正激式、双管正激式、并联交错双管正激式、半桥式和全桥式电路。深入分析研究类... 提出准单级单向Buck直流变换器型高频链并网逆变器电路结构与拓扑族。其电路结构是由单向隔离Buck直流变换器和极性反转逆变桥级联构成;其拓扑族包括推挽正激式、双管正激式、并联交错双管正激式、半桥式和全桥式电路。深入分析研究类逆变器的电路拓扑、电流瞬时值控制策略、稳态原理特性和关键电路参数设计准则。以推挽正激式拓扑为例,设计并研制出1kW48VDC/220V50HzAC并网逆变器样机。研究结果表明,此类逆变器具有高频电气隔离、电路结构简洁、准单级功率变换、变换效率高、极性反转逆变桥功率开关电压应力低且为ZVZCS、并网电流质量高等优点。 展开更多
关键词 并网逆变器 高频链 单向buck直流变换器 推挽正激式 准单级 电流瞬时值控制
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A low noise high efficiency buck DC-DC converter with sigma-delta modulation
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作者 蔡曙江 皮常明 +1 位作者 严伟 李文宏 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2011年第7期81-88,共8页
Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode(DCM) c... Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode(DCM) controller and gate width controller,is proposed to improve efficiency.Instead of PWM modulation, sigma-delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike.The proposed converter has been designed and fabricated by a 0.35μm CMOS process.Measured results show that the peak efficiency of the converter can reach 93%and sigma-delta modulation suppresses the harmonic spike by 30 dB over PWM modulation. 展开更多
关键词 buck dc-dc converter PWM modulation sigma-delta modulation DCM dead time control width control current sensing
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DCM,FSM,dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range
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作者 皮常明 严伟 +1 位作者 张科 李文宏 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2010年第8期114-120,共7页
This paper presents a width controller,a dead time controller,a discontinuous current mode(DCM) controller and a frequency skipping modulation(FSM) controller for a high frequency high efficiency buck DC-DC conver... This paper presents a width controller,a dead time controller,a discontinuous current mode(DCM) controller and a frequency skipping modulation(FSM) controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed DC-DC converter controllers have been designed and fabricated in the Chartered 0.35μm CMOS process,and the measured results show that the efficiency of the buck DC-DC converter is above 80%over a wide load current range from 8 to 570 mA,and the peak efficiency is 86%at 10 MHz switching frequency. 展开更多
关键词 buck dc-dc converter dead time controller discontinuous current mode width controller frequency skipping modulation
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A voltage-mode DC–DC buck converter with fast output voltage-tracking speed and wide output voltage range 被引量:1
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作者 杨淼 张白雪 +2 位作者 曹允 孙锋锋 孙伟锋 《Journal of Semiconductors》 EI CAS CSCD 2014年第5期93-97,共5页
A high switching frequency voltage-mode buck converter with fast voltage-tracking speed and wide output voltage range has been proposed. A novel error amplifier (EA) is presented to achieve a high DC gain and get hi... A high switching frequency voltage-mode buck converter with fast voltage-tracking speed and wide output voltage range has been proposed. A novel error amplifier (EA) is presented to achieve a high DC gain and get high phase margin, including a resistor and capacitor net, a unit gain block and a high gain block. The investigated converter has been fabricated with GF 0.35 μm CMOS process and can operate at 6 MHz with the output voltage range from 0.6 to 3.4 V. The experimental results show that the voltage-tracking speed can achieve 8.8 μs/V for up-tracking and 6 μs/V for down-tracking. Besides, the recovery time is less than 8 μs while the load current suddenly changes 400 mA. 展开更多
关键词 dc-dc buck converter VOLTAGE-MODE voltage-tracking speed
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50 MHz dual-mode buck DC–DC converter
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作者 张章 王星 +3 位作者 余文成 谭烨 杨依忠 解光军 《Journal of Semiconductors》 EI CAS CSCD 2016年第8期85-89,共5页
A 50 MHz 1.8/0.9 V dual-mode buck DC-DC converter is proposed in this paper. A dual-mode control for high-frequency DC-DC converter is presented to enhance the conversion efficiency of light-load in this paper. A nove... A 50 MHz 1.8/0.9 V dual-mode buck DC-DC converter is proposed in this paper. A dual-mode control for high-frequency DC-DC converter is presented to enhance the conversion efficiency of light-load in this paper. A novel zero-crossing detector is proposed to shut down synchronous rectification transistor NMOS when the inductor crosses zero, which can decrease the power loss caused by reverse current and the trip point is adjusted by regulating IBIAS (BIAS current). A new logic control for pulse-skipping modulation loop is also presented in this paper, which has advantages of simple structure and low power loss. The proposed converter is realized in SMIC 0.18μm 1-poly 6-metal mixed signal CMOS process. With switching loss, conduction loss and reverse current related loss optimized, an efficiency of 57% is maintained at 10 mA, and a peak efficiency of 71% is measured at nominal operating conditions with a voltage conversion of 1.8 to 0.9 V. 展开更多
关键词 dual-mode buck dc-dc converter zero-cross detection
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