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Linearized Phase Detector Zero Crossing DPLL Performance Evaluation in Faded Mobile Channels 被引量:1
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作者 Qassim Nasir Saleh Al-Araji 《Circuits and Systems》 2011年第3期139-144,共6页
Zero Crossing Digital Phase Locked Loop with Arc Sine block (AS-ZCDPLL) is used to linearize the phase difference detection, and enhance the loop performance. The loop has faster acquisition, less steady state phase e... Zero Crossing Digital Phase Locked Loop with Arc Sine block (AS-ZCDPLL) is used to linearize the phase difference detection, and enhance the loop performance. The loop has faster acquisition, less steady state phase error, and wider locking range compared to the conventional ZCDPLL. This work presents a Zero Crossing Digital Phase Locked Loop with Arc Sine block (ZCDPLL-AS). The performance of the loop is analyzed under mobile faded channel conditions. The mobile channel is assumed to be two path fading channel corrupted by additive white Gaussian noise (AWGM). It is shown that for a constant filter gain, the frequency spread has no effect on the steady state phase error variance when the loop is subjected to a phase step. For a frequency step and under the same conditions, the effect on phase error is minimal. 展开更多
关键词 NON-uniform sampling Digital Phase Locked LOOPS ZERO CROSSING dpll Mobile Faded CHANNELS
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Fixed Point Iteration Chaos Controlled ZCDPLL
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作者 Qassim Nasir 《International Journal of Communications, Network and System Sciences》 2016年第11期535-544,共11页
The stable operation of first and second order Zero Crossing Digital Phase Locked Loop (ZCDPLL) is extended by using a Fixed Point Iteration (FPI) method with relaxation. The non-linear components of ZCDPLL such as sa... The stable operation of first and second order Zero Crossing Digital Phase Locked Loop (ZCDPLL) is extended by using a Fixed Point Iteration (FPI) method with relaxation. The non-linear components of ZCDPLL such as sampler phase detector and Digital Controlled Oscillator (DCO) lead to unstable and chaotic operation when the filter gains are high. FPI will be used to stabilize the chaotic operation and consequently extend the lock range of the loop. The proposed stabilized loop can work in higher filter gains which are needed for faster signal acquisition. 展开更多
关键词 Non-uniform sampling Digital Phase Locked Loops Zero Crossing dpll Chaos Control
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PCM/FM遥测中频数字化接收机设计与实现 被引量:2
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作者 郑立岗 吕幼新 +1 位作者 向敬成 王丽华 《信号处理》 CSCD 2004年第2期122-126,共5页
本文利用高速高精度数据采集、数字下变频DDC(Digital Downconversion)CORDIC(Coordinate RotationDigital Computer)数字鉴相、一阶差分鉴频和均匀采样二阶数字锁相环DPLL(Digital Phage—Locked Loop)去除多谱勒频率和载波频偏等技术... 本文利用高速高精度数据采集、数字下变频DDC(Digital Downconversion)CORDIC(Coordinate RotationDigital Computer)数字鉴相、一阶差分鉴频和均匀采样二阶数字锁相环DPLL(Digital Phage—Locked Loop)去除多谱勒频率和载波频偏等技术完成了2MHz码速率10.7MHz中频频率的PCM/FM遥测中频数字化接收机设计,并给出了实现系统接收线性动态范围和不同输入信噪比条件输出信号波形的测试结果。测试结果表明,设计系统的接收线性动态范围可达50dB以上,而在输入信噪比≤7dB的情况下设计系统还可以正常工作。 展开更多
关键词 PCM/FM 遥测 数据采集 数字下变频 数字鉴相 接收机 均匀采样二阶数字锁相环
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