Calculations Energy of the (<i>nl</i>²) ¹<i>L^π</i>Doubly Excited States of Two-Electron Systems via the Screening Constant by Unit Nuclear Charge Formalism

In this work, the total energies of doubly excited states (ns2) 1Se, (np2) 1De, (nd2) 1Ge, (nf2) 1Ie, (ng2) 1Ke, and (nh2) 1Me of the helium isoelectronic sequence with Z ≤ 10 are calculated in the framework of the variational method of the Screening Constant by Unit Nuclear Charge (SCUNC). These calculations are performed using a new wavefunction correlated to Hylleraas-type. The possibility of using the SCUNC method in the investigation of high-lying Doubly Excited States(DES) in two-electron systems is demonstrated in the present work in the case of the (nl2) 1Lπ doubly excited states, where accurate total energies are tabulated up to n = 20. All the results obtained in this paper are in agreement with the values of the available literature and may be useful for future experimental and theoretical studies on the doubly excited (nl2) 1Lπ states of two-electron systems.

Variational Calculations of Energies of the (2<i>snl</i>) ^1,3<i>L^π</i>and (2<i>pnl</i>) ^1,3<i>L^π</i>Doubly Excited States in Two-Electron Systems Applying the Screening Constant per Unit Nuclear Charge

In this paper, resonance energies and excitation energies of doubly 2sns 1,3Se, 2snp 1,3P0, 2pnp 1,3De, 2pnd 1,3F0 and 2pnf 1,3Ge excited states of the helium isoelectronic sequence with Z ≤ 10 are calculated. Calculations are carried out in the framework of the variational procedure of the formalism of the Screening Constant per Unit Nuclear Charge (SCUNC). New correlated wave function of Hylleraas type is used. Precise resonance and excitation energies are tabulated and good agreement is obtained when a comparison is made with available literature values.

A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation

This paper presents a transient-enhanced NMOS low-dropout regulator （LDO） for portable applications with parallel feedback compensation. The parallel feedback structure adds a dynamic zero to get an adequate phase margin with a load current variation from 0 to 1 A. A class-AB error amplifier and a fast charging/discharging unit are adopted to enhance the transient performance. The proposed LDO has been implemented in a 0.35 μm BCD process. From experimental results, the regulator can operate with a minimum dropout voltage of 150 mV at a maximum 1 A load and IQ of 165 μA. Under the full range load current step, the voltage undershoot and overshoot of the proposed LDO are reduced to 38 mV and 27 mV respectively.

An 11-bit 200 MS/s subrange SAR ADC with low-cost integrated reference buffer

This paper presents an 11-bit 200MS/s subrange S AR ADC with an integrated reference buffer in 65nm CMOS.The proposed ADC employs a 3.5-bit flash ADC for coarse conversion,and a compact timing scheme at the flash/SAR boundary to speed up the conversion.The flash decision is used to control charge compensating for the reference voltage to reduce its input-dependent fluctuation.Measurement results show that the fabricated ADC has achieved significant improvement by applying the reference charge compensation.In addition,the ADC achieves a maximum signal-to-noise-and-distortion ratio of 59.3dB at 200MS/s.It consumes 3.91mW from a 1.2V supply,including the reference buffer.