A Stroke-Limitation AMD Control System with Variable Gain and Limited Area for High-Rise Buildings

Collisions between a moving mass and an anti-collision device increase structural responses and threaten structural safety.An active mass damper(AMD)with stroke limitations is often used to avoid collisions.However,a strokelimited AMD control system with a fixed limited area shortens the available AMD stroke and leads to significant control power.To solve this problem,the design approach with variable gain and limited area(VGLA)is proposed in this study.First,the boundary of variable-limited areas is calculated based on the real-time status of the moving mass.The variable gain(VG)expression at the variable limited area is deduced by considering the saturation of AMD stroke.Then,numerical simulations of a stroke-limited AMD control system with VGLA are conducted on a high-rise building structure.These numerical simulations show that the proposed approach has superior strokelimitation performance compared with a stroke-limited AMD control system with a fixed limited area.Finally,the proposed approach is validated through experiments on a four-story steel frame.

A 1.45GHz LNA with Low Power,Wide Variable Gain Range and Ultra Low Noise Degradation

A LNA with a novel variable gain solution is presented.Compared with the conventional variable gain solutions of LNA,which have more noise degradations when in low gain mode,this solution gives about 25dB variable gain range in 3dB steps,which would cause ultra low noise figure degradation by 0 3～0 5dB.In addition,extra power consumption is not needed by this solution compared with other solutions.

A photoacoustic imaging system with variable gain at different depths

We established a photoacoustic imaging(PAI)system that can provide variable gain at different depths.The PAI system consists of a pulsed laser with an optical parametric oscillator working at a 728 nmwavelength and an imaging-acquisition-and-processing unit with an ultrasound transducer.Avoltage-controlled attenuator was used to realize variable gain at different depths when acquiring PAI signals.The proof-of-concept imaging results for variable gain at different depths were achieved using specic phantoms.Both resolution and optical contrast obtained through the results of variable gain for a targeted depth range are better than those of constant gain for all depths.To further testify the function,we imaged the sagittal section of the body of in vivo nude mice.In addition,we imaged an absorption sample embedded in a chicken breast tissue,reaching a maximum imaging depth of
4.6 cm.The results obtained using the proposed method showed better resolution and contrast than when using 50 dB gain for all depths.The depth range resolution was
1 mm,and the maximum imaging depth of our system reached
4.6 cm.Furthermore,blood vessels can be revealed and targeted depth range can be selected in nude mice imaging.

Adaptive estimation and nonlinear variable gain compensation of the contouring error for precise parametric curve following

Contour following is one of the most important issues faced by many computer-numerical-control(CNC) machine tools to achieve high machining precision. This paper presents a new real-time error compensation method aiming at reducing the contouring error caused by facts such as servo lag and dynamics mismatch in parametric curved contour-following tasks. Due to the lack of high-precision contouring-error estimation method for free-form parametric curved toolpath, the error can hardly be compensated effectively. Therefore, an adaptive accurate contouring-error estimation algorithm is proposed first, where a tangential-error backstepping method based on Taylor's expansion is developed to rapidly find the closest point on the parametric curve to the actual motion position. On this foundation, the contouring error is compensated using a proposed nonlinear variable-gain compensation method, where the compensation gain is obtained according to not only the contouring-error magnitude but also its direction variation. The stability of the system after compensation is analyzed afterwards according to the Jury stability criterion.By design of the compensator in accordance with the presented contouring-error compensation method as well as the stability analyzation result, the balance between the response speed and the contour control stability can be effectively made. Experimental tests demonstrate the feasibility of the presented methods in both contouring-error estimation and contour-accuracy improvement.Contributions of this research are significant for enhancing the contour-following performance of the CNC machine tools.

STABILIZATION OF THE QUADRUPLE INVERTED PENDULUM BY VARIABLE UNIVERSE ADAPTIVE FUZZY CONTROLLER BASED ON VARIABLE GAIN H_∞ REGULATOR

In this paper, the variable universe adaptive fuzzy controller based on variable gain Ha regulator （VGH∞R） is designed to stabilize a quadruple inverted pendulum. The VGH∞R is a novel robust gain-scheduling approach. By utilizing VGH∞R technique, a more precise real-time feedback gain matrix, which is changing with states, is obtained, Via the variable gain matrix 10 state variables of quadruple inverted pendulum are transformed into a kind of synthesis error （E） and synthesis rate of change of error （EC） at sampling time. Therefore, the dimension of the multivariable system is reduced and the variable universe adaptive fuzzy controller is built. Experiments illustrate the effectiveness of the proposed control scheme.

A CMOS variable gain low-noise amplifier with ESD protection for 5 GHz applications

This paper presents a variable gain low-noise amplifier（VG-LNA） for 5 GHz applications.The effect of the input parasitic capacitance on the inductively degenerated common source LNA＇s input impedance is analyzed in detail.A new ESD and LNA co-design method was proposed to achieve good performance.In addition,by using a simple feedback loop at the second stage of the LNA,continuous gain control is realized.The measurement results of the proposed VG-LNA exhibit 25 dB（-3.3 dB to 21.7 dB） variable gain range,2.8 dB noise figure at the maximum gain and 1 dBm IIP3 at the minimum gain,while the DC power consumption is 9.9 mW under a 1.8 V supply voltage.

A novel reconfigurable variable gain amplifier for a multi-mode multi-band receiver

This paper presents a novel approach for designing a reconfigurable variable gain amplifier（VGA） for the multi-mode multi-band receiver system RF front-end applications.The configuration,which is comprised of gain circuits,control circuit,DC offset cancellation circuit and mode switch circuit is proposed to save die area and power consumption with the function of multi-mode and multi-band through reusing.The VGA is realized in 0.18μm CMOS technology with 1.8 V power supply voltage providing a gain tuning range from 5 to 87 dB when the control voltage varies from 0 to 1.8 V.The 3 dB bandwidth is about 80 MHz for all levels of control voltage（all gains）.Also,the DC offset cancellation circuit can effectively suppress DC offset to a value of less than 40 mV at the output regardless of the input.The overall power consumption is less than 3 mA,and die area is 705×100μm^2.

A CMOS variable gain LNA for UWB receivers

A CMOS variable gain low noise amplifier （LNA） is presented for 4.24.8 GHz ultra-wideband appli- cation in accordance with Chinese standard. The design method for the wideband input matching is presented and the low noise performance of the LNA is illustrated. A three-bit digital programmable gain control circuit is exploited to achieve variable gain. The design was implemented in 0.13μm RF CMOS process, and the die occupies an area of 0.9 mm2 with ESD pads. Totally the circuit draws 18 mA DC current from 1.2 V DC supply, the LNA exhibits minimum noise figure of 2.3 dB, S（1, 1） less than -9 dB and S（2, 2） less than -10 dB. The maximum and the minimum power gains are 28.5 dB and 16 dB respectively. The tuning step of the gain is about 4 dB with four steps in all. Also the input 1 dB compression point is -10 dBm and input third order intercept point （IIP3） is -2 dBm.

Compensation for secondary uncertainty in electro-hydraulic servo system by gain adaptive sliding mode variable structure control

Based on consideration of the differential relations between the immeasurable variables and measurable variables in electro-hydraulic servo system,adaptive dynamic recurrent fuzzy neural networks(ADRFNNs) were employed to identify the primary uncertainty and the mathematic model of the system was turned into an equivalent linear model with terms of secondary uncertainty.At the same time,gain adaptive sliding mode variable structure control(GASMVSC) was employed to synthesize the control effort.The results show that the unrealization problem caused by some system's immeasurable state variables in traditional fuzzy neural networks(TFNN) taking all state variables as its inputs is overcome.On the other hand,the identification by the ADRFNNs online with high accuracy and the adaptive function of the correction term's gain in the GASMVSC make the system possess strong robustness and improved steady accuracy,and the chattering phenomenon of the control effort is also suppressed effectively.

A signal-summing programmable gain amplifier employing binary-weighted switching and constant-g--_m bias

A novel programmable gain amplifier（ PGA） based on a signal-summing topology is proposed. Different from conventional signal-summing variable gain amplifiers（ VGA）,a binary-weighted switching technique is employed to vary the current-steering transistors＇ aspect ratio to change their transconductance, and hence, an accurate gain step size of 6dB is achieved. The constant-g_m biasing technique and the matching of the transistors and resistors ensures that the gain of the proposed topology is independent of the variation of process, voltage and temperature（ PVT）. P-well NMOS（ Nmetal oxide semiconductor） transistors are utilized to eliminate the influence of back-gate effect which will induce gain error.The source-degeneration technique ensures good linearity performance at a low gain. The proposed PGA is fabricated in a0.18 μm CMOS（ complementary metal oxide semiconductor）process. The measurement results show a variable gain ranging from 0 to24 dB with a step size of 6 dB and a maximum gain error of 0. 3dB. A constant 3dB bandwidth of 210 MHz is achieved at different gain settings. The measured output 3rd intercept point（OIP3） and minimum noise figure（ NF） are20. 9 dBm and 11.1 dB, respectively. The whole PGA has a compact layout of 0.068 mm^2. The total power consumption is4. 8 mW under a 1. 8 V supply voltage.

CMOS Automatic Gain Control Circuit with DC Offset Cancellation for FM/cw Ladar

This paper presented an automatic gain control （AGC） circuit suitable for FM/cw ladar. The proposed architecture was based on two-stage variable gain amplifier （VGA） chain with a novel DC offset canceller circuit, which contained an improved Gilbert cell and a Gm-C feedback loop. To keep the VGA with a linearity in dB characteristic, an improved exponential gain control circuit was introduced. The AGC was implemented in 0.18 gm standard CMOS process. Simulation and measurement results verified that its gain ranged from -20 dB to 30 dB, and band- width ranged from 100 kHz to 10 MHz. Its power consumption was 19.8 mW under a voltage supply of 3.3 V.

A Low-Voltage,Low-Power CMOS High Dynamic Range dB-Linear VGA for Super Heterodyne Receivers

This paper presents a low-voltage low-power variable gain amplifier,which is applied in the automatic gain control loop of a super heterodyne receiver. Six stages are cascaded to provide an 81dB digitally controlled gain range in a 3dB step. The gain step error is less than 0.5dB. It operates at an intermediate frequency of 300kHz, and the power consumption is 1.35mW from a 1.8V supply. The prototype chip is implemented in a TSMC＇s 0.18μm 1P6M CMOS process and occupies approximately 0.24mm^2 . It is very suitable for portable wire- less communication systems. The measurement results agree well with the system requirements.

A compact and reconfigurable low noise amplifier employing combinational active inductors and composite resistors feedback techniques

A compact and reconfigurable low noise amplifier(LNA)is proposed by combining an input transistor,composite transistors with Darlington configuration as the amplification and output transistor,T-type structure composite resistors instead of a simplex structure resistor,a shunt inductor feedback realized by a tunable active inductor(AI),a shunt inductor peaking technique realized by another tunable AI.The division and collaboration among different resistances in the T-type structure composite resistor realize simultaneously input impedance matching,output impedance matching and good noise performance;the shunt feedback and peaking technique using two tunable AIs not only extend frequency bandwidth and improve gain flatness,but also make the gain and frequency band can be tuned simultaneously by the external bias of tunable AIs;the Darlington configuration of composite transistors provides high gain;furthermore,the adoption of the small size AIs instead of large size passive spiral inductor,and the use of composite resistors make the LNA have a small size.The LNA is fabricated and verified by GaAs/InGaP hetero-junction bipolar transistor(HBT)process.The results show that at the frequency of 7 GHz,the gain S_(21)is maximum and up to 19 dB;the S_(21)can be tuned from 17 dB to 19 dB by tuning external bias of tunable AIs,that is,the tunable amount of S_(21)is 2 dB,and similarly at 8 GHz;the tunable range of 3 dB bandwidth is 1 GHz.In addition,the gain S_(21)flatness is better than 0.4 dB under frequency from 3.1 GHz to 10.6 GHz;the size of the LNA only has 760μm×1260μm(including PADs).Therefore,the proposed strategies in the paper provide a new solution to the design of small size and reconfigurable ultra-wideband(UWB)LNA and can be used further to adjust the variations of gain and bandwidth of radio frequency integrated circuits(RFICs)due to package,parasitic and the variation of fabrication process and temperature.

Predictor and ESO-based adaptive tracking control of heterogeneous vehicle platoon

This paper investigates the distributed adaptive platoon tracking problem of third-order heterogeneous vehicles subject to model uncertainties. The design process is divided into two steps. Firstly, an adaptive tracking controller is designed for the dynamic leading vehicle. And then, the distributed adaptive controllers are established for followers. Moreover, the predictor technique is used to improve the estimate performance of the adaptive law, and the total disturbance is approximated and compensated by the variable gain nonlinear extended state observers(NESOs) driven by the estimation error. By introducing the variable gain hyperbolic tangent tracking differentiator(HTTD), the “complexity explosion” problem is avoided. The feasibility and effectiveness of the proposed protocol are verified by simulation tests.

A differential automatic gain control circuit with two-stage -10 to 50 dB tuning range VGAs

A differential automatic gain control （AGC） circuit is presented. The AGC architecture contains twostage variable gain amplifiers （VGAs） which are implemented with a Gilbert cell, a peak detector （PD）, a low pass filter, an operational amplifier, and two voltage to current （V-I） convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-um single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from -10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit （containing output buffers and a band-gap reference） consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 us to stabilize the output. The frequency response of the circuit has almost a constant -3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.

A 60-dB linear VGA with novel exponential gain approximation

A CMOS variable gain amplifier（VGA） that adopts a novel exponential gain approximation is presented.No additional exponential gain control circuit is required in the proposed VGA used in a direct conversion receiver.A wide gain control voltage from 0.4 to 1.8 V and a high linearity performance are achieved.The three-stage VGA with automatic gain control（AGC） and DC offset cancellation（DCOC） is fabricated in a 0.18-μm CMOS technology and shows a linear gain range of more than 58-dB with a linearity error less than ±1 dB.The 3-dB bandwidth is over 8 MHz at all gain settings.The measured input-referred third intercept point（IIP3） of the proposed VGA varies from-18.1 to 13.5 dBm,and the measured noise figure varies from 27 to 65 dB at a frequency of 1 MHz.The dynamic range of the closed-loop AGC exceeds 56 dB,where the output signal-to-noise-and-distortion ratio（SNDR） reaches 20 dB.The whole circuit,occupying 0.3 mm^2 of chip area,dissipates less than 3.7 mA from a 1.8-V supply.

A low power automatic gain control loop for a receiver

This paper proposes a new structure to lower the power consumption of a variable gain amplifier（VGA） and keep the linearity of the VGA unchanged.The structure is used in a high rate amplitude-shift keying（ASK） based IF-stage.It includes an automatic gain control（AGC） loop and ASK demodulator.The AGC mainly consists of sixstage VGAs.The IF-stage is realized in 0.18μm CMOS technology.The measurement results show that the power consumption of the whole system is very low.The system consumes 730μA while operating at 1.8 V.The minimum ASK signal the system could detect is 0.7 mV（peak to peak amplitude）.

A 3.8 GHz programmable gain amplifier with a 0.1 dB gain step

A broadband programmable gain amplifier（PGA） with a small gain step and low gain error has been designed in 0.13 m CMOS technology. The PGA was implemented with open-loop architecture to provide wide bandwidth. A two-stage gain control method, which consists of a resistor ladder attenuator and an active fine gain control stage, provides the small gain step. A look-up table based gain control method is introduced in the fine gain control stage to lower the gain error.The proposedPGAshows a decibel-linear variable gainfrom4 to20 dB with a gain step of 0.1 dB and a gain error less than˙0.05 dB. The 3-dB bandwidth and maximum IIP3 are 3.8 GHz and 17 dBm, respectively.

A 1.2-V CMOS front-end for LTE direct conversion SAW-less receiver

A CMOS RF front-end for the long-term evolution（LTE） direct conversion receiver is presented.With a low noise transconductance amplifier（LNA）,current commutating passive mixer and transimpedance operational amplifier（TIA）,the RF front-end structure enables high-integration,high linearity and simple frequency planning for LTE multi-band applications.Large variable gain is achieved using current-steering transconductance stages.A current commutating passive mixer with 25%duty-cycle LO improves gain,noise and linearity.A direct coupled current-input filter（DCF） is employed to suppress the out-of-band interferer.Fabricated in a 0.13-μm CMOS process,the RF front-end achieves a 45 dB conversion voltage gain,2.7 dB NF,-7 dBm IIP3,and ＋60 dBm IIP2 with calibration from 2.3 to 2.7 GHz.The total RF front end with divider draws 40 mA from a single 1.2-V supply.

A 5 Gb/s CMOS adaptive equalizer for serial link

A 5 Gb/s adaptive equalizer with a new adaptation scheme is presented here by using 0.13μm CMOS process. The circuit consists of the combination of equalizer amplifier, limiter amplifier and adaptation loop. The adaptive algorithm exploits both the low frequency gain loop and the equalizer loop to minimize the inter-symbol interference （ISI） for a variety of cable characteristics. In addition, an offset cancellation loop is used to alleviate the offset influence of the signal path. The adaptive equalizer core occupies an area of 0.3567 mm2 and consumes a power consumption of 81.7 mW with 1.8 V power supply. Experiment results demonstrate that the equalizer could compensate for a designed cable loss with 0.23 UI peak-to-peak jitter.