Influence of the electrolyte conductivity on the critical current density and the breakdown voltage

The work investigates influence of the electrolyte conductivity on the onset of partial contact glow discharge electrolysis(CGDE)in a water electrolysis.Critical current density(CCD)and breakdown voltage were measured together with in situ observation of hydrogen bubble behavior,whose influence has not been focused on.For a fixed current during normal electrolysis,hydrogen coalescence adjacent to cathode surface was invigorated at a lower conductivity.Photographic analyses elucidated the hydrogen coalescence characteristics by quantifying size and population of detached hydrogen bubbles.The CCD increased about 104% within given range of conductivity(11.50-127.48 mS·cm^(-1))due to impaired bubble coalescence,which delays hydrogen film formation on the cathode.Meanwhile,decreasing trend of breakdown voltage was measured with increased conductivity showing maximum drop of 74%.It is concluded that onset of partial CGDE is directly affected by hydrodynamic bubble behaviors,whereas the electrolyte conductivity affects the bubble formation characteristics adjacent to cathode electrode.

Design optimization of high breakdown voltage vertical GaN junction barrier Schottky diode with high-K/low-K compound dielectric structure

A vertical junction barrier Schottky diode with a high-K/low-K compound dielectric structure is proposed and optimized to achieve a high breakdown voltage(BV).There is a discontinuity of the electric field at the interface of high-K and low-K layers due to the different dielectric constants of high-K and low-K dielectric layers.A new electric field peak is introduced in the n-type drift region of junction barrier Schottky diode(JBS),so the distribution of electric field in JBS becomes more uniform.At the same time,the effect of electric-power line concentration at the p-n junction interface is suppressed due to the effects of the high-K dielectric layer and an enhancement of breakdown voltage can be achieved.Numerical simulations demonstrate that GaN JBS with a specific on-resistance(R_(on,sp)) of 2.07 mΩ·cm^(2) and a BV of 4171 V which is 167% higher than the breakdown voltage of the common structure,resulting in a high figure-of-merit(FOM) of 8.6 GW/cm^(2),and a low turn-on voltage of 0.6 V.

Breakdown voltage model and structure realization of a thin silicon layer with linear variable doping on a silicon on insulator high voltage device with multiple step field plates

Based on the theoretical and experimental investigation of a thin silicon layer（TSL） with linear variable doping（LVD） and further research on the TSL LVD with a multiple step field plate（MSFP）,a breakdown voltage（BV） model is proposed and experimentally verified in this paper.With the two-dimensional Poisson equation of the silicon on insulator（SOI） device,the lateral electric field in drift region of the thin silicon layer is assumed to be constant.For the SOI device with LVD in the thin silicon layer,the dependence of the BV on impurity concentration under the drain is investigated by an enhanced dielectric layer field（ENDIF）,from which the reduced surface field（RESURF） condition is deduced.The drain in the centre of the device has a good self-isolation effect,but the problem of the high voltage interconnection（HVI） line will become serious.The two step field plates including the source field plate and gate field plate can be adopted to shield the HVI adverse effect on the device.Based on this model,the TSL LVD SOI n-channel lateral double-diffused MOSFET（nLDMOS） with MSFP is realized.The experimental breakdown voltage（BV） and specific on-resistance（R on,sp） of the TSL LVD SOI device are 694 V and 21.3 ·mm 2 with a drift region length of 60 μm,buried oxide layer of 3 μm,and silicon layer of 0.15 μm,respectively.

A Test Study of 50% Lightning Impulse Breakdown Voltage on Rod-Plane Gap with Two-Phase Mixture of Gas and Solid Particles

A test study on 50% lightning impulse breakdown voltage in two-phase mixture of gas and solid particles has been carried out in a specially designed discharge cabinet. A mechanical sieve is set up for sifting different solid particles into the discharge space uniformly. The lightning impulse voltage according with international electro-technical commission （IEC） standard is applied to the electrodes inside the discharge cabinet by the rule of up-down method in a total of 40 times. The results showed that the 50% lightning impulse breakdown voltage in two-phase mixture of gas and solid particles has its own features and is much different from that in air.

Non-depletion floating layer in SOI LDMOS for enhancing breakdown voltage and eliminating back-gate bias effect

A non-depletion floating layer silicon-on-insulator （NFL SOI） lateral double-diffused metal–oxide–semiconductor （LDMOS） is proposed and the NFL-assisted modulated field （NFLAMF） principle is investigated in this paper. Based on this principle, the floating layer can pin the potential for modulating bulk field. In particular, the accumulated high concentration of holes at the bottom of the NFL can efficiently shield the electric field of the SOI layer and enhance the dielectric field in the buried oxide layer （BOX）. At variation of back-gate bias, the shielding charges of NFL can also eliminate back-gate effects. The simulated results indicate that the breakdown voltage （BV） is increased from 315 V to 558 V compared to the conventional reduced surface field （RESURF） SOI （CSOI） LDMOS, yielding a 77% improvement. Furthermore, due to the field shielding effect of the NFL, the device can maintain the same breakdown voltage of 558 V with a thinner BOX to resolve the thermal problem in an SOI device.

A novel high breakdown voltage and high switching speed GaN HEMT with p-GaN gate and hybrid AlGaN buffer layer for power electronics applications

A novel p-GaN gate GaN high-electron-mobility transistor(HEMT)with an AlGaN buffer layer and hybrid dielectric zone(H-HEMT)is proposed.The hybrid dielectric zone is located in the buffer and composed of horizontal arranged HfO2 zone and SiNx zone.The proposed H-HEMT is numerically simulated and optimized by the Silvaco TCAD tools(ATLAS),and the DC,breakdown,C-V and switching properties of the proposed device are characterized.The breakdown voltage of the proposed HEMT is significantly improved with the introduction of the hybrid dielectric zone,which can effectively modulate the electric field distribution in the GaN channel and the buffer.High breakdown voltage of 1490 V,low specific on-state resistance of 0.45 mΩ·cm2 and high Baliga's figure of merit(FOM)of 5.3 GW/cm2,small R onQ oss of 212 mΩ·nC,high turn-on speed 627 V/ns and high turn-off speed 87 V/ns are obtained at the same time with the gate-to-drain distance L gd of 6μm.

Collector optimization for tradeoff between breakdown voltage and cut-off frequency in SiGe HBT

As is well known, there exists a tradeoff between the breakdown voltage BVcEO and the cut-off frequency fT for a standard heterojunction bipolar transistor （HBT）. In this paper, this tradeoff is alleviated by collector doping engineering in the SiGe HBT by utilizing a novel composite of P＋ and N- doping layers inside the collector-base （CB） space-charge region （SCR）. Compared with the single N-type collector, the introduction of the thin P＋ layers provides a reverse electric field weakening the electric field near the CB metallurgical junction without changing the field direction, and the thin N layer further effectively lowers the electric field near the CB metallurgical junction. As a result, the electron temperature near the CB metallurgical junction is lowered, consequently suppressing the impact ionization, thus BVcEO is improved with a slight degradation in fT. The results show that the product of fTXBVcEo is improved from 309.51 GHz.V to 326.35 GHz.V.

An AlGaN/GaN HEMT with a reduced surface electric field and an improved breakdown voltage

A reduced surface electric field in an AlGaN/GaN high electron mobility transistor （HEMT） is investigated by employing a localized Mg-doped layer under the two-dimensional electron gas （2-DEG） channel as an electric field shaping layer. The electric field strength around the gate edge is effectively relieved and the surface electric field is distributed evenly as compared with those of HEMTs with conventional source-connected field plate and double field plate structures with the same device physical dimensions. Compared with the HEMTs with conventional sourceconnected field plates and double field plates, the HEMT with a Mg-doped layer also shows that the breakdown location shifts from the surface of the gate edge to the bulk Mg-doped layer edge. By optimizing both the length of Mg-doped layer, Lm, and the doping concentration, a 5.5 times and 3 times the reduction in the peak electric field near the drain side gate edge is observed as compared with those of the HEMTs with source-connected field plate structure and double field plate structure, respectively. In a device with VGS = -5 V, Lm 1.5 m, a peak Mg doping concentration of 8×10^17 cm-3 and a drift region length of 10 m, the breakdown voltage is observed to increase from 560 V in a conventional device without field plate structure to over 900 V without any area overhead penalty.

Enhancement of Breakdown Voltage in AlGaN/GaN High Electron Mobility Transistors Using Double Buried p-Type Layers

A novel A1GaN/GaN high electron mobility transistor （HEMT） with double buried p-type layers （DBPLs） in the GaN buffer layer and its mechanism are studied. The DBPL A1GaN/GaN HEMT is characterized by two equi-long p-type GaN layers which are buried in the GaN buffer layer under the source side. Under the condition of high-voltage blocking state, two reverse p-n junctions introduced by the buried p-type layers will effectively modulate the surface and bulk electric fields. Meanwhile, the buffer leakage is well suppressed in this structure and both lead to a high breakdown voltage. The simulations show that the breakdown voltage of the DBPL structure can reach above 2000 V from 467 V of the conventional structure with the same gate-drain length of 8μm.

Improving breakdown voltage performance of SOI power device with folded drift region

A novel silicon-on-insulator（SOI） high breakdown voltage（BV） power device with interlaced dielectric trenches（IDT） and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer,which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges（holes） at the corner of IDT.The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V.

An AlGaN/GaN HEMT with enhanced breakdown and a near-zero breakdown voltage temperature coefficient

An AlGaN/GaN high-electron mobility transistor（HEMT） with a novel source-connected air-bridge field plate（AFP） is experimentally verified.The device features a metal field plate that jumps from the source over the gate region and lands between the gate and drain.When compared to a similar size HEMT device with a conventional field plate（CFP） structure,the AFP not only minimizes the parasitic gate to source capacitance,but also exhibits higher OFF-state breakdown voltage and one order of magnitude lower drain leakage current.In a device with a gate to drain distance of 6 μm and a gate length of 0.8 μm,three times higher forward blocking voltage of 375 V was obtained at VGS =-5 V.In contrast,a similar sized HEMT with a CFP can only achieve a breakdown voltage no higher than 125 V using this process,regardless of device dimensions.Moreover,a temperature coefficient of 0 V/K for the breakdown voltage is observed.However,devices without a field plate（no FP） and with an optimized conventional field plate（CFP） exhibit breakdown voltage temperature coefficients of-0.113 V/K and-0.065 V/K,respectively.

Closed-form breakdown voltage/specific on-resistance model using charge superposition technique for vertical power double-diffused metal–oxide–semiconductor device with high-κ insulator

An improved vertical power double-diffused metal–oxide–semiconductor（DMOS） device with a p-region（P1） and high-κ insulator vertical double-diffusion metal–oxide–semiconductor（HKP-VDMOS） is proposed to achieve a better performance on breakdown voltage（BV）/specific on-resistance（Ron,sp） than conventional VDMOS with a high-κ insulator（CHK-VDMOS）.The main mechanism is that with the introduction of the P-region,an extra electric field peak is generated in the drift region of HKP-VDMOS to enhance the breakdown voltage.Due to the assisted depletion effect of this p-region,the specific on-resistance of the device could be reduced because of the high doping density of the N-type drift region.Meanwhile,based on the superposition of the depleted charges,a closed-form model for electric field/breakdown voltage is generally derived,which is in good agreement with the simulation result within 10% of error.An HKP-VDMOS device with a breakdown voltage of 600 V,a reduced specific on-resistance of 11.5 Ωm·cm^2 and a figure of merit（FOM）（BV^2/Ron,sp）of 31.2 MW·cm^-2 shows a substantial improvement compared with the CHK-VDMOS device.

Study of predicting breakdown voltage of stator insulation in generator based on BP neural network

The breakdown voltage plays an important role in evaluating residual life of stator insulation in generator.In this paper,we discussed BP neural network that was used to predict the breakdown voltage of stator insulation in generator of 300MW/18kV.At first the neural network has been trained by the samples that include the varieties of dielectric loss factor tanδ,the partial discharge parameters and breakdown voltage.Then we tried to predict the breakdown voltage of samples and stator insulations subjected to multi-stress aging by the trained neural network.We found that it's feasible and accurate to predict the voltage.This method can be applied to predict breakdown voltage of other generators which have the same insulation structure and material.

Analysis of the breakdown mechanism for an ultra high voltage high-side thin layer silicon-on-insulator p-channel low-density metal-oxide semiconductor

This paper discusses the breakdown mechanism and proposes a new simulation and test method of breakdown voltage （BV） for an ultra-high-voltage （UHV） high-side thin layer silicon-on-insulator （SOI） p-channel low-density metal- oxide semiconductor （LDMOS）. Compared with the conventional simulation method, the new one is more accordant with the actual conditions of a device that can be used in the high voltage circuit. The BV of the SOI p-channel LDMOS can be properly represented and the effect of reduced bulk field can be revealed by employing the new simulation method. Simulation results show that the off-state （on-state） BV of the SOI p-channel LDMOS can reach 741 （620） V in the 3μm-thick buried oxide layer, 50μm-length drift region, and at -400 V back-gate voltage, enabling the device to be used in a 400 V UHV integrated circuit.

Non-recessed-gate quasi-E-mode double heterojunction AlGaN/GaN high electron mobility transistor with high breakdown voltage

A non-recessed-gate quasi-E-mode double heterojunction A1GaN/GaN high electron mobility transistor （quasi-E- DHEMT） with a thin barrier, high breakdown voltage and good performance of drain induced barrier lowering （DIBL） was presented. Due to the metal organic chemical vapor deposition （MOCVD） grown 9-nm undoped A1GaN barrier, the effect that the gate metal depleted the two-dimensiomal electron gas （2DEG） was greatly impressed. Therefore, the density of carriers in the channel was nearly zero. Hence, the threshold voltage was above 0 V. Quasi-E-DHEMT with 4.1%tm source-to-drain distance, 2.6-μm gate-to-drain distance, and 0.5-μm gate length showed a drain current of 260 mA/mm. The threshold voltage of this device was 0.165 V when the drain voltage was 10 V and the DIBL was 5.26 mV/V. The quasi-E-DHEMT drain leakage current at a drain voltage of 146 V and a gate voltage of -6 V was below 1 mA/mm. This indicated that the hard breakdown voltage was more than 146 V.

Terminal-optimized 700-V LDMOS with improved breakdown voltage and ESD robustness

A novel terminal-optimized triple RESURF LDMOS(TOTR-LDMOS) is proposed and verified in a 0.25-μm bipolarCMOS-DMOS(BCD) process. By introducing a low concentration region to the terminal region, the surface electric field of the TOTR-LDMOS decreases, helping to improve the breakdown voltage(BV) and electrostatic discharge(ESD) robustness. Both traditional LDMOS and TOTR-LDMOS are fabricated and investigated by transmission line pulse(TLP) tests,direct current(DC) tests, and TCAD simulations. The results show that comparing with the traditional LDMOS, the BV of the TOTR-LDMOS increases from 755 V to 817 V without affecting the specific on-resistance(R_(on,sp)) of 6.99Ω·mm^(2).Meanwhile, the ESD robustness of the TOTR-LDMOS increases by 147%. The TOTR-LDMOS exhibits an excellent performance among the present 700-V LDMOS devices.

One-dimensional breakdown voltage model of SOI RESURF lateral power device based on lateral linearly graded approximation

A novel one-dimensional（1D） analytical model is proposed for quantifying the breakdown voltage of a reduced surface field（RESURF） lateral power device fabricated on silicon on an insulator（SOI） substrate.We assume that the charges in the depletion region contribute to the lateral PN junctions along the diagonal of the area shared by the lateral and vertical depletion regions.Based on the assumption,the lateral PN junction behaves as a linearly graded junction,thus resulting in a reduced surface electric field and high breakdown voltage.Using the proposed model,the breakdown voltage as a function of device parameters is investigated and compared with the numerical simulation by the TCAD tools.The analytical results are shown to be in fair agreement with the numerical results.Finally,a new RESURF criterion is derived which offers a useful scheme to optimize the structure parameters.This simple 1D model provides a clear physical insight into the RESURF effect and a new explanation on the improvement in breakdown voltage in an SOI RESURF device.

Improvement on the breakdown voltage for silicon-on-insulator devices based on epitaxy-separation by implantation oxygen by a partial buried n^+-layer

A novel silicon-on-insulator （SOI） high-voltage device based on epitaxy-separation by implantation oxygen （SIMOX） with a partial buried n＋-layer silicon-on-insulator （PBN SOI） is proposed in this paper. Based on the proposed expressions of the vertical interface electric field, the high concentration interface charges which are accumu- lated on the interface between top silicon layer and buried oxide layer （BOX） effectively enhance the electric field of the BOX （EI）, resulting in a high breakdown voltage （BV） for the device. For the same thicknesses of top silicon layer （10 μm） and BOX （0.375 μm）, the EI and BV of PBN SOI are improved by 186.5% and 45.4% in comparison with those of the conventional SOI, respectively.

The Influence of Electrode Surface Mercury Film Deformation on the Breakdown Voltage of a Sub-Nanosecond Pulse Discharge Tube

A sub-nanosecond pulse discharge tube is a gas discharge tube which can generate a rapid high-voltage pulse of kilo-volts in amplitude and sub-nanoseconds in width. In this paper, the sub-nanosecond pulse discharge tube and its working principles are described. Because of the phenomenon that the deformation process of the mercury film on the electrode surface lags behind the charging process, the mercury film deformation process affects the dynamic breakdown voltage of the tube directly. The deformation of the mercury film is observed microscopically, and the dynamic breakdown voltage of the tube is messured using an oscillograph. The results show that all the parameters in the charging process, such as charging resistance, charging capacitance and DC power supply, affect the dynamic breakdown voltage of the tube. Based on these studies, the output pulse amplitude can be controlled continuously and individually by adjusting the power supply voltage. When the DC power supply is adjusted from 7 kV to 10 kV, the dynamic breakdown voltage ranges from 6.5 kV to 10 kV. According to our research, a kind of sub-nanosecond pulse generator is made, with a pulse width ranging from 0.5 ns to 2.5 ns, a rise time from 0.32 ns to 0.58 ns, and a pulse amplitude that is adjustable from 1.5 kV to 5 kV.

A new analytical model for the surface electric field distribution and breakdown voltage of the SOI trench LDMOS

A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.