Symmetrical monopolar configuration is the prevailing scheme configuration for modular multilevel converter based high-voltage direct current(MMC-HVDC) links, in which severe DC overvoltage or overcurrent can be cause...Symmetrical monopolar configuration is the prevailing scheme configuration for modular multilevel converter based high-voltage direct current(MMC-HVDC) links, in which severe DC overvoltage or overcurrent can be caused by the DC faults. To deal with the possible asymmetry in the DC faults and the coupling effects of the DC lines, this paper analyzes the DC fault characteristics based on the phase-mode transformation. First, the DC grid is decomposed into the common-mode and the differential-mode networks. The equivalent models of the MMCs and DC lines in the two networks are derived, respectively. Then, based on the state matrices, a unified numerical calculation method for the fault voltages and currents at the DC side is proposed. Compared with the time-domain simulations performed on PSCAD/EMTDC, the accuracy of the proposed method is validated. Last, the system parameter analysis shows that the grounding parameters play an important role in reducing the severity of the pole-to-ground faults, whereas the coupling effects of the DC lines should be considered when calculating the DC fault currents associated with the pole-to-pole faults.展开更多
Threshold voltage (V<sub>TH</sub>) is the most evocative aspect of MOSFET operation. It is the crucial device constraint to model on-off transition characteristics. Precise V<sub>TH</sub> value...Threshold voltage (V<sub>TH</sub>) is the most evocative aspect of MOSFET operation. It is the crucial device constraint to model on-off transition characteristics. Precise V<sub>TH</sub> value of the device is extracted and evaluated by several estimation techniques. However, these assessed values of V<sub>TH</sub> diverge from the exact values due to various short channel effects (SCEs) and non-idealities present in the device. Numerous prevalent V<sub>TH</sub> extraction methods are discussed. All the results are verified by extensive 2-D TCAD simulation and confirmed through analytical results at 10-nm technology node. Aim of this research paper is to explore and present a comparative study of largely applied threshold extraction methods for bulk driven nano-MOSFETs especially at 10-nm technology node along with various sub 45-nm technology nodes. Application of the threshold extraction methods to implement noise analysis is briefly presented to infer the most appropriate extraction method at nanometer technology nodes.展开更多
文摘Symmetrical monopolar configuration is the prevailing scheme configuration for modular multilevel converter based high-voltage direct current(MMC-HVDC) links, in which severe DC overvoltage or overcurrent can be caused by the DC faults. To deal with the possible asymmetry in the DC faults and the coupling effects of the DC lines, this paper analyzes the DC fault characteristics based on the phase-mode transformation. First, the DC grid is decomposed into the common-mode and the differential-mode networks. The equivalent models of the MMCs and DC lines in the two networks are derived, respectively. Then, based on the state matrices, a unified numerical calculation method for the fault voltages and currents at the DC side is proposed. Compared with the time-domain simulations performed on PSCAD/EMTDC, the accuracy of the proposed method is validated. Last, the system parameter analysis shows that the grounding parameters play an important role in reducing the severity of the pole-to-ground faults, whereas the coupling effects of the DC lines should be considered when calculating the DC fault currents associated with the pole-to-pole faults.
文摘Threshold voltage (V<sub>TH</sub>) is the most evocative aspect of MOSFET operation. It is the crucial device constraint to model on-off transition characteristics. Precise V<sub>TH</sub> value of the device is extracted and evaluated by several estimation techniques. However, these assessed values of V<sub>TH</sub> diverge from the exact values due to various short channel effects (SCEs) and non-idealities present in the device. Numerous prevalent V<sub>TH</sub> extraction methods are discussed. All the results are verified by extensive 2-D TCAD simulation and confirmed through analytical results at 10-nm technology node. Aim of this research paper is to explore and present a comparative study of largely applied threshold extraction methods for bulk driven nano-MOSFETs especially at 10-nm technology node along with various sub 45-nm technology nodes. Application of the threshold extraction methods to implement noise analysis is briefly presented to infer the most appropriate extraction method at nanometer technology nodes.
