Investigation of the trigger voltage walk-in effect in LDMOS for high-voltage ESD protection

The trigger voltage walkin effect has been investigated by designing two different laterally diffused metal-oxide-semiconductor （LDMOS） transistors with an embedded silicon controlled rectifier （SCR）. By inserting a P＋ implant region along the outer and the inner boundary of the N＋ region at the drain side of a conventional LDMOS transistor, we fabricate the LDMOS-SCR and the SCR-LDMOS devices with a different triggering order in a 0.5/zm bipolar-CMOS-DMOS process, respectively. First, we perform transmission line pulse （TLP） and DC-voltage degradation tests on the LDMOS-SCR. Results show that the trigger voltage walk-in effect can be attributed to the gate oxide trap generation and charge trapping. Then, we perform TLP tests on the SCR-LDMOS. Results indicate that the trigger voltage walk-in effect is remarkably reduced. In the SCR-LDMOS, the embedded SCR is triggered earlier than the LDMOS, and the ESD current is mainly discharged by the parasitic SCR structure. The electric potential between the drain and the gate decreases significantly after snapback, leading to decreased impact ionization rates and thus reduced trap generation and charge trapping. Finally, the above explanation of the different trigger voltage walk-in behavior in LDMOS-SCR and SCR-LDMOS devices is confirmed by TCAD simulation.

长航时惯导系统的随机游走误差传播规律及抑制方法

角度随机游走(angle random walk,ARW)误差已成为制约长航时惯性导航系统精度的主要因素。为了减弱ARW对系统精度的影响,针对初始对准和长航时导航两个方面研究误差传播规律及抑制方法。仿真结果表明:ARW直接影响方位对准精度,在长航时的导航中,游走系数N所产生的速度振荡幅值与60N的常值漂移大致相当,姿态振荡误差中的24 h周期因素更为关键,ARW产生的经度误差发散项均方差随时间的平方根增长;系统可采用卡尔曼滤波削弱ARW所造成的对准误差,通过水平阻尼方法可以消除由ARW引起的位置误差中的振荡项。