5G Wideband Bandpass Filtering Power Amplifiers Based on a Bandwidth-Extended Bandpass Matching Network

In this paper,a 5G wideband power amplifier(PA)with bandpass filtering response is synthesized using a bandwidth-extended bandpass filter as the matching network(MN).In this structure,the bandwidth(θ_(C))is defined as a variable in the closedform equations provided by the microstrip bandpass filter.It can be extended over a wide range only by changing the characteristic impedances of the structure.Different from the other wideband MNs,the extension of bandwidth does not increase the complexity of the structure(order n is fixed).In addition,based on the bandwidth-extended structure,the wideband design of bandpass filtering PA is not limited to the fixed bandwidth of the specific filter structure.The theoretical analysis of the MN and the design flow of the PA are provided in this design.The fabricated bandpass filtering PA can support almost one-octave bandwidth(2-3.8 GHz),covering the two 5G bands(n41 and n78).The drain efficiency of 47%-60%and output power higher than 40 dBm are measured.Good frequency selectivity in S-parameter measurements can be observed.

Research Towards Terahertz Power Amplifiers in Silicon-Based Process

In view of the existing design challenges for Terahertz(THz)power amplifiers(PAs),the common design methods and the efforts of the State Key Laboratory of Millimeter Wave,Southeast University,China in the development of silicon-based THz PAs,mainly including silicon-based PAs with operating frequencies covering 100–300 GHz,are summarized in this paper.Particularly,we design an LC-balun-based two-stage differential cascode PA with a center frequency of 150 GHz and an output power of 14 dBm.Based on a Marchand balun,we report a 220 GHz three-stage differential cascode PA with a saturated output power of 9.5 dBm.To further increase the output power of THz PA,based on a four-way differential power combining technique,we report a 211–263 GHz dual-LC-tank-based broadband PA with a recorded 14.7 dBm Psat and 16.4 dB peak gain.All the above circuits are designed in a standard 130 nm silicon germanium(SiGe)BiCMOS process.

Adaptive Digital Predistortion Schemes to Linearize RF Power Amplifiers with Memory Effects

To compensate for nonlinear distortion introduced by RF power amplifiers （PAs） with memory effects, two correlated models, namely an extended memory polynomial （EMP） model and a memory lookup table （LUT） model, are proposed for predistorter design. Two adaptive digital predistortion （ADPD） schemes with indirect learning architecture are presented. One adopts the EMP model and the recursive least square （RLS） algorithm, and the other utilizes the memory LUT model and the least mean square （LMS） algorithm. Simulation results demonstrate that the EMP-based ADPD yields the best linearization performance in terms of suppressing spectral regrowth. It is also shown that the ADPD based on memory LUT makes optimum tradeoff between performance and computational complexity.

Robust Digital Predistortion for LTE/5G Power Amplifiers Utilizing Negative Feedback Iteration

A robust digital predistortion(DPD)technique utilizing negative feedback iteration is introduced for linearizing power amplifiers(PAs)in long term evolution(LTE)/5G systems.Different from the conventional direct learning and indirect learning structure,the proposed DPD suggests a two-step method to identify the predistortion.Firstly,a negative feedback based iteration is used to estimate the optimal DPD signal.Then the corresponding DPD parameters are extracted by forward modeling with the input signal and optimal DPD signal.The iteration can be applied to both single-band and dual-band PAs,which will achieve superior linear performance than the conventional direct learning DPD while having a relatively low computational complexity.The measurement is carried out on a broadband Doherty PA(DPA)with a 200 MHz bandwidth LTE signal at 2.1 GHz,and on a 5G DPA with two 10 MHz LTE signals at 3.4/3.6 GHz for validation in dual-band scenarios.

An Envelope Hammerstein Model for Power Amplifiers

In this paper, an envelope Hammerstein （EH） model is introduced to describe dynamic input -output characteristics of RF power amplifiers. In the modeling approach, we use a new truncation method and an established nonlinear time series method to determine model structure. Then, we discuss the process of model parameter extraction in detailed. Finally, a 2 W WCDMA power amplifier is measured to verify the performance of EH model, and good agreement between model output and measurement result shows our model can accurately predict output characteristic of the power amplifier.

Volterra series based predistortion for broadband RF power amplifiers with memory effects

RF power amplifiers （PAs） are usually considered as memoryless devices in most existing predistortion techniques. However, in broadband communication systems, such as WCDMA, the PA memory effects are significant, and memoryless predistortion cannot linearize the PAs effectively. After analyzing the PA memory effects, a novel predistortion method based on the simplified Volterra series is proposed to linearize broadband RF PAs with memory effects. The indirect learning architecture is adopted to design the predistortion scheme and the reeursive least squares algorithm with forgetting factor is applied to identify the parameters of the predistorter. Simulation results show that the proposed predistortion method can compensate the nonlinear distortion and memory effects of broadband RF PAs effectively.

Multislice behavioral modeling based on envelope domain for power amplifiers

An envelope domain multislice behavioral modeling is introduced. The tradition AM-AM and AM- PM characteristics of power amplifiers axe extended to envelope domain and base-band filter is applied to distortion complex envelope signal for description of the envelope memory effect. Using traditional one and two-tone tests, the coefficients of nonlinear model and the FIR filter can be extracted. At last the model has been applied to a 10 W WCDMA Power amplifier to predict its output signal. And simulation results show that the model output conforms very well to the traditional transistor level simulation results.

Design Technologies for Silicon-Based High-Efficiency RF Power Amplifiers:A Brief Overview

This paper presents a brief overview of several promising design technologies for high efficiency silicon-based radio frequency （RF） power amplifiers （PAs） as well as the use of these technologies in mobile broadband wireless communications. Four important aspects of PA design are addressed in this paper. First, we look at class-E PA design equations and provide an example of a class-E PA that achieves efficiency of 65-70% at 2.4 GHz. Then, we discuss state-of-the-art envelope tracking （ET） design for monolithic wideband RF mobile transmitter applications. A brief overview of Doherty PA design for the next-generation wireless handset applications is then given. Towards the end of the paper, we discuss an inherently broadband and highly efficient class-J PA design targeting future multi-band multi-standard wireless communication protocols.

Analysis of the third harmonic for class-F power amplifiers with an Ⅰ–Ⅴ knee effect

The appearance of third-generation semiconductors represented by gallium nitride （GaN） material greatly improves the output power of a power amplifier （PA）, but the efficiency of the PA needs to be further improved. The Class-F PA reduces the overlap of drain voltage and current by tuning harmonic impedance so that high efficiency is achieved. This paper begins with the principle of class-F PA, regards the third harmonic voltage as an independent variable, analyzes the influence of the third harmonic on fundamental, and points out how drain efficiency and output power vary with the third harmonic voltage with an I-V knee effect. Finally, the best third harmonic impedance is found mathematically. We compare our results with the Loadpull technique in advanced design system environment and conclude that an optimized third harmonic impedance is open in an ideal case, while it is not at an open point with the I-V knee effect, and the drain efficiency with optimized third harmonic impedance is 4% higher than that with the third harmonic open.

Amplified Spontaneous Emission in Single Frequency Double-Clad Fiber Power Amplifiers

Amplified spontaneous emission （ASE） in diode laser pumped double-clad fiber power amplifiers is studied experimentally, The dependences of ASE on fiber length and cross section of active core are discussed and the variations of ASE power as the function of pumping and signal power are investigated. There are indications that long fibers with large mode area need stronger input signals to suppress ASE. It is shown that a 150 mW input signal can suppress the ASE by 40 dB in a 4 m large mode area fiber, while to efficiently suppress the ASE in a 10 m fiber, stronger input signal is needed. 12.5 W and 16.1 W single frequency CW output power are obtained from 4 m fiber and 10 m fiber respectively. No stimulated Brillouin scattering （SBS） was observed

NONLINEAR CHARACTERIZATION OF CONCURRENT DUAL-BAND RF POWER AMPLIFIERS

In this paper, the synchronous concurrent dual-band RF signal is used to drive the RF Power Amplifier (PA). The nonlinear characterization of a concurrent dual-band RF PA is discussed while two band signals in the dual-band are modulated by CDMA2000 and WCDMA signals. When the two band signals in the dual-band of the PA are modulated with the same signals, it is found that the nonlinearity of the PA can be expressed by any of the two corresponding baseband data. On the other hand, when the two band signals in the dual-band of the PA are modulated with two different signals, the PA nonlinearity cannot be characterized by any of the two corresponding baseband data. In this case, its nonlinearity has to be denoted by a composite signals consisting of the two baseband signals. Consequently, the requirements for the speed of the A/D converter can be largely reduced. The experimental results with CDMA2000 and WCDMA signals demonstrate the speed of the A/D converter required is only 30 M Sample Per Second (SaPS), but it will be at least 70 M SaPS for the conventional method.

Broadband Power Amplifiers for Unified Base Stations

A broadband power amplifier is required to cover the full range of cellular frequency band—from 700 MHz to 2600 MHz—in a base station that supports multiple frequency bands simultaneously. Conventional laterally diffused metal oxide semiconductor （LDMOS） transistors support narrow band applications up to 3 GHz. However, they cannot operate beyond 1 GHz in broadband applications. GaN transistors have much higher power density and operational frequency compared with LDMOS. Therefore, they are ideal for broadband amplifiers that support multiple bands. Theories for designing broadband amplifiers are introduced in this article, and a 500-2500 MHz 60 W GaN amplifier is discussed.

A novel topology with controllable wideband baseband impedance for power amplifiers

This paper presents a novel topology to control the baseband impedance of a power amplifier(PA)to avoid performance deterioration in concurrent dual-band mode.This topology can avoid pure resonance of capacitors and inductors LC,which leads to a high impedance at some frequency points.Consequently,it can be applied to transmitters that are excited by broadband signals.In particular,by adjusting the circuit parameters and increasing stages,the impedance of the key frequency bands can be flexibly controlled.A PA is designed to support this design idea.Its saturated output power is around 46.7 dBm,and the drain efficiency is>68.2%(1.8-2.3 GHz).Under concurrent two-tone excitation,the drain efficiency reaches around 40%even under 5.5 dB back-off power with the tone spacing from 10 MHz to 500 MHz.These results demonstrate that the proposed topology is capable of controlling wideband baseband impedance.

Broadband Dual-Input Doherty Power Amplifier Design Based on a Simple Adaptive Power Dividing Ratio Function

In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency points can be characterized by a polynomial.And in the practical test,the coefficients of SSF can be determined by measuring a small number of data points of input power.Same as other dualinput DPAs,the proposed approach can also achieve high output power and back-off efficiency in a broadband operation band by adjusting the power distribution ratio flexibly.Finally,a 1.5-2.5 GHz highefficiency dual-input Doherty power amplifier is implemented according to this approach.The test results show that the peak power is 48.6-49.7d Bm,and the 6-d B back-off efficiency is 51.0-67.0%,and the saturation efficiency is 52.4-74.6%.The digital predistortion correction is carried out at the frequency points of 1.8/2.1GHz,and the adjacent channel power ratio is lower than-54.5d Bc.Simulation and experiment results can verify the effectiveness and correctness of the proposed method.

On-chip power-combining techniques for watt-level linear power amplifiers in 0.18 μm CMOS

Three linear CMOS power amplifiers （PAs） with high output power （more than watt-level output power） for high data-rate mobile applications are introduced. To realize watt-level output power, there are two 2.4 GHz PAs using an on-chip parallel combining transformer （PCT） and one 1.95 GHz PA using an on-chip series combining transformer （SCT） to combine output signals of multiple power stages. Furthermore, some linearization techniques including adaptive bias, diode linearizer, multi-gated transistors （MGTR） and the second harmonic control are applied in these PAs. Using the proposed power combiner, these three PAs are designed and fabricated in TSMC 0.18 μm RFCMOS process. According to the measurement results, the proposed two linear 2.4 GHz PAs achieve a gain of 33.2 dB and 34.3 dB, a maximum output power of 30.7 dBm and 29.4 dBm, with 29% and 31.3% of peak PAE, respectively. According to the simulation results, the presented linear 1.95 GHz PA achieves a gain of 37.5 dB, a maximum output power of 34.3 dBm with 36.3% of peak PAE.

A high power active circulator using GaN MMIC power amplifiers

This paper presents a 2.4 GHz hybrid integrated active circulator consisting of three power amplifiers and three PCB-based Wilkinson power dividers. The power amplifiers were designed and fabricated in a standard 0.35-μm AlGaN/GaN HEMT technology, and combined with three traditional power dividers on FR4 using bonding wires. Due to the isolation of power dividers, the isolation between three ports is achieved; meanwhile, due to the unidirectional characteristics of the power amplifiers, the nonreciprocal transfer characteristic of the circulator is realized. The measured insertion gain of the proposed active circulator is about 2-2.7 dB at the center frequency of 2.4 GHz, the isolation between three ports is better than 20 dB over 1.2-3.4 GHz, and the output power of the designed active circulator achieves up to 20.1-21.2 dBm at the center frequency.

Powerful 2 μm Silica Fiber Sources: A Review of Recent Progress and Prospects

A review on the progress of powerful 2 μm silica fiber sources in past decades is presented. We review the state-of-the-art records and representative achievements of 2 μm high-average-power continuous- wave, pulsed fiber lasers and amplifiers, and powerful superfluorescent sources. Challenges which limit the further power scaling of 2 μm silica fiber sources are discussed, including pumping brightness limitation, thermal problem and nonlinear effects. Potential and promising roadmaps to go beyond these limitations, like tandem pumping and beam combining, are discussed. Prospects of powerful 2 μm silica fiber sources are also presented in the end of paper.

A 24−30 GHz 8-element dual-polarized 5G FR2 phased-array transceiver IC with 20.8-dBm TX OP1dB and 4.1-dB RX NF in 65-nm CMOS

This article presents an 8-element dual-polarized phased-array transceiver(TRX)front-end IC for millimeter-wave(mm-Wave)5G new radio(NR).Power enhancement technologies for power amplifiers(PA)in mm-Wave 5G phased-array TRX are discussed.A four-stage wideband high-power class-AB PA with distributed-active-transformer(DAT)power combining and multi-stage second-harmonic traps is proposed,ensuring the mitigated amplitude-to-phase(AM-PM)distortions across wide carrier frequencies without degrading transmitting(TX)power,gain and efficiency.TX and receiving(RX)switching is achieved by a matching network co-designed on-chip T/R switch.In each TRX element,6-bit 360°phase shifting and 6-bit 31.5-dB gain tuning are respectively achieved by the digital-controlled vector-modulated phase shifter(VMPS)and differential attenuator(ATT).Fabricated in 65-nm bulk complementary metal oxide semiconductor(CMOS),the proposed TRX demonstrates the measured peak TX/RX gains of 25.5/21.3 dB,covering the 24−29.5 GHz band.The measured peak TX OP1dB and power-added efficiency(PAE)are 20.8 dBm and 21.1%,respectively.The measured minimum RX NF is 4.1 dB.The TRX achieves an output power of 11.0−12.4 dBm and error vector magnitude(EVM)of 5%with 400-MHz 5G NR FR2 OFDM 64-QAM signals across 24−29.5 GHz,covering 3GPP 5G NR FR2 operating bands of n257,n258,and n261.

Design of a memory polynomial predistorter for wideband envelope tracking amplifiers

Efficiency and linearity of the microwave power amplifier are critical elements for mobile communication systems. A memory polynomial baseband predistorter based on an indirect learning architecture is presented for improving the linearity of an envelope tracing （ET） amplifier with application to a wireless transmitter. To deal with large peak-to-average ratio （PAR） problem, a clipping procedure for the input signal is employed. Then the system performance is verified by simulation results. For a single carrier wideband code division multiple access （WCDMA） signal of 16-quadrature amplitude modulation （16-QAM）, about 2% improvement of the error vector magnitude （EVM） is achieved at an average output power of 45.5 dBm and gain of 10.6 dB, with adjacent channel leakage ratio （ACLR） of -64.55 dBc at offset frequency of 5 MHz. Moreover, a three-carrier WCDMA signal and a third-generation （3G） long term evolution （LTE） signal are used as test signals to demonstrate the performance of the proposed linearization scheme under different bandwidth signals.

Robust power amplifier predistorter by using memory polynomials

In memory polynomial predistorter design, the coefficient estimation algorithm based on normalized least mean square is sensitive to initialization parameters. A predistorter based on generalized normalized gradient descent algorithm is proposed. The merit of the GNGD algorithm is that its learning rate provides compensation for the independent assumptions in the derivation of NLMS, thus its stability is improved. Computer simulation shows that the proposed predistorter is very robust. It can overcome the sensitivity of initialization parameters and get a better linearization performance.