This paper describes an in-house developed language tool called VPerl used in developing a 250 MHz 32-bit high-performance low power embedded CPU core. The authors showed that use of this tool can compress the Verilog...This paper describes an in-house developed language tool called VPerl used in developing a 250 MHz 32-bit high-performance low power embedded CPU core. The authors showed that use of this tool can compress the Verilog code by more than a factor of 5, increase the efficiency of the front-end design, reduce the bug rate significantly. This tool can be used to enhance the reusability of an intellectual property model, and facilitate porting design for different platforms.展开更多
Tons of solid particles, like carbon, beryllium and tungsten with diameters of several to several hundreds microns, would be generated as dusts in vacuum vessel during operation of ITER, In accident scenarios, e.g., l...Tons of solid particles, like carbon, beryllium and tungsten with diameters of several to several hundreds microns, would be generated as dusts in vacuum vessel during operation of ITER, In accident scenarios, e.g., loss of vacuum accident, the potentially combustible dust particles can be suspended by the air ingress and entrained into the whole vessel, and impose a risk of dust explosions to the whole facility. Therefore, the mechanism of particle resuspension was investigated theoretically. A force balance approach and numerical fittings have been utilized to develop a semi-empirical particle resuspension model based on a group of particle resuspension experimental data. The model has been applied into a three-dimensional computational fluid dynamics code, GASFLOW. The model validation has been done by comparison of the numerical predictions about particle resuspension rates in given incoming flows against the corresponding experimental data. The comparisons have proved the validity of the developed model.展开更多
文摘This paper describes an in-house developed language tool called VPerl used in developing a 250 MHz 32-bit high-performance low power embedded CPU core. The authors showed that use of this tool can compress the Verilog code by more than a factor of 5, increase the efficiency of the front-end design, reduce the bug rate significantly. This tool can be used to enhance the reusability of an intellectual property model, and facilitate porting design for different platforms.
文摘Tons of solid particles, like carbon, beryllium and tungsten with diameters of several to several hundreds microns, would be generated as dusts in vacuum vessel during operation of ITER, In accident scenarios, e.g., loss of vacuum accident, the potentially combustible dust particles can be suspended by the air ingress and entrained into the whole vessel, and impose a risk of dust explosions to the whole facility. Therefore, the mechanism of particle resuspension was investigated theoretically. A force balance approach and numerical fittings have been utilized to develop a semi-empirical particle resuspension model based on a group of particle resuspension experimental data. The model has been applied into a three-dimensional computational fluid dynamics code, GASFLOW. The model validation has been done by comparison of the numerical predictions about particle resuspension rates in given incoming flows against the corresponding experimental data. The comparisons have proved the validity of the developed model.
