论秦及汉初的临时性供役方式“冗”

秦及汉初简牍所见“冗”并不是长期供役之意,而是由供役者临时性承担某些职事或职役,是一种特殊的供役方式。从人员隶属关系上看,临时供役者不属于供役部门的正任人员,与供役部门的正任人员的管理亦不相同。官府为将其与供役部门的正任人员相区别,这类临时性的供役人员称为“冗者”。“冗者”在完成临时性的事项或规定的时间后,即可恢复原本身份。“冗”这种供役方式很好地解决了事务性机关的吏员短缺问题,能够在短时期内给官府提供大量劳动力,同时也能够使事务性机构人员更为精简,减少政府开支,提高行政效率。

秦简牍“内”“冗”再辨

本文通过分析"内""冗"在不同批次秦简牍中的形体特征,认为二者可能并没有经历形体完全一样没有任何区别特征的"同形不别"的阶段,二者之间其实是有区别特征的。"冗"写作"内"应该认为是一般的形近相混的讹误。■和■不能等同,前者只能释为"内"而后者则只能释为"冗",它们不能像某些学者所说的那样看作是"内""冗"所从分化的共同形体,也不能说它们既可作"内"也可作"冗"。

秦简“冗”“内”“穴”辨误——兼论秦至汉初隶书的规范化问题

秦简"冗"与"内"确有相同的写法,即"■"既可作"内",也可作"冗",而在汉简中"内"与"冗"字的写法则趋于分明。此外,"穴"与"冗"、"穴"与"内"的写法差异在秦简中亦不甚明确,故《列子》《荀子》《商子》《韩非子》《吕氏春秋》等著作中出现的"穴""冗""内"之误写,以及当下秦简整理研究中出现的"内"与"冗"的误释,多系于对秦隶的误释而来。秦简"内"与"冗"的混同属于隶变后的"同形不别"现象,而"穴"与"内"、"穴"与"冗"的误写则属于"形近相混"的讹写。自秦"书同文"、程邈"作隶书"后,秦隶在写法上并非完全统一,上述文字的最终规范,可能与汉初的"正字"有关。

REDUNDANCY TECHNOLOGY FOR AIRCRAFT MULTI-CHANNEL DC POWER SUPPLY SYSTEM

The redundancy technology for the aircraft multi-channel DC electrical power supply system is studied. In this system, the key loads can obtain power from seven sources. The direct current bus power control unit （DC BPCU） is put forward to manage the power supply system automatically. The redundancy innovation is also applied in both hardware and software of DC BPCU. Furthermore, redundancy fault diagnosis is discussed through the existing parts. Experiments and applications show that the proposed aircraft DC power supply system possesses many advantages of high reliability, high automation and so on.

Reliability Analysis of a Mixed Redundant Model in C 3I System

Aim To define a mixed redundant model(MRM), improving the reliability of C 3I system. Methods The model combined the technology characters of two? unit system with one warm stand by unit and function substitute system. The reliability and availability equations of MRM were deduced. Results and Conclusion Compared with several other reliability models, it has obvious effect upon improving the system reliability. The effect? cost rate is very high among these models. The model can be used in reliability design, evaluation and check of C 3I system. Only a little attached cost is needed to improve C 3I system reliability effectively.

Design of rate compatible punctured IRA codes for IR-HARQ schemes

An incremental redundancy hybrid automatic repeat- request （IR-HARQ）scheme based on irregular repeat-accumulate （IRA）codes is proposed. The design of rate compatible punctured IRA codes suitable for an IR-HARQ scheme is well formulated and efficiently solved by a linear-programming method, along with a one-dimensional approach for density evolution. Compared to IR-HARQ schemes based on turbo codes, simulation shows that the proposed IR-HARQ schemes based on IRA codes may achieve almost the same performance at a block size of 1 024, but better throughput at a block size of 4 096. The advantages of the proposed scheme in implementation, including decoding complexity and parallelism, make it more attractive in practice than the IR-HARQ schemes based on both turbo and LDPC codes.

A Decentralized Autonomous Control on Highly Redundant Robot Manipulators

The control method of highly redundant robot manipulators is introduced. A decentralized autonomous control scheme is used to guide the movement of robot manipulators so that the work done by manipulators is minimized. The method of computing pseudoinverse which needs too many complicated calculation can be avoided. Then the calculation and control of robots are simplified. At the same time system robustness/fault tolerance is achieved.

Optimization and Application of SRAM in 90nm CMOS Technology

This paper presents an optimized SRAM that is repairable and dissipates less power. To improve the yield of SRAMs per wafer,redundancy logic and an E-FUSE box are added to the SRAM and an SR SRAM is set up. In order to reduce power dissipation,power on/off states and isolation logic are introduced into the SR SRAM and an LPSR SRAM is constructed. The optimized LPSR SRAM64K × 32 is used in SoC and the testing method of the LPSR SRAM64K × 32 is also discussed. The SoC design is successfully implemented in the Chartered 90nm CMOS process. The SoC chip occupies 5. 6mm× 5. 6ram of die area and the power dissipation is 1997mW. The test results indicate that LPSR SRAM64K ×32 obtains 17. 301% power savings and the yield of the LPSR SRAM64K × 32s per wafer is improved by 13. 255%.

Redundancy Elimination in GPRS network

The mechanisms of TCP’s retransmission and reset will result in redundant packets. These redundant packets are often sent unnecessarily to the user over a slow last-hop link delaying useful traffic. This is a problem for wide-area wireless links, such as General Packet Radio Service (GPRS), because unnecessary transmissions waste already limited radio bandwidth, battery power at the mobile terminal and incurs monetary cost due to charging by data volume. The paper first describes a GPRS model, then discusses how to eliminate the redundant packets in GPRS network and presents the simulation results in Network Simulation 2 (NS 2). The more traffic is, the more the network can benefit. In heavy traffic, it can even get more than 30% improvement in throughput. Average delay and loss percent are also lowered.

Feature selection based on mutual information and redundancy-synergy coefficient

Mutual information is an important information measure for feature subset. In this paper, a hashing mechanism is proposed to calculate the mutual information on the feature subset. Redundancy-synergy coefficient, a novel redundancy and synergy measure of features to express the class feature, is defined by mutual information. The information maximization rule was applied to derive the heuristic feature subset selection method based on mutual information and redundancy-synergy coefficient. Our experiment results showed the good performance of the new feature selection method.

Power-line interference suppression of MT data based on frequency domain sparse decomposition

Power-line interference is one of the most common noises in magnetotelluric(MT)data.It usually causes distortion at the fundamental frequency and its odd harmonics,and may also affect other frequency bands.Although trap circuits are designed to suppress such noise in most of the modern acquisition devices,strong interferences are still found in MT data,and the power-line interference will fluctuate with the changing of load current.The fixed trap circuits often fail to deal with it.This paper proposes an alternative scheme for power-line interference removal based on frequency-domain sparse decomposition.Firstly,the fast Fourier transform of the acquired MT signal is performed.Subsequently,a redundant dictionary is designed to match with the power-line interference which is insensitive to the useful signal.Power-line interference is separated by using the dictionary and a signal reconstruction algorithm of compressive sensing called improved orthogonal matching pursuit(IOMP).Finally,the frequency domain data are switched back to the time domain by the inverse fast Fourier transform.Simulation experiments and real data examples from Lu-Zong ore district illustrate that this scheme can effectively suppress the power-line interference and significantly improve data quality.Compared with time domain sparse decomposition,this scheme takes less time consumption and acquires better results.

Array processing-a new method to detect and correct errors on array resistivity logging tool measurements

In recent years more and more multi-array logging tools, such as the array induction and the array lateralog, are applied in place of conventional logging tools resulting in increased resolution, better radial and vertical sounding capability and other features. Multi-array logging tools acquire several times more individual measurements than conventional logging tools. In addition to new information contained in these data, there is a certain redundancy among the measurements. The sum of the measurements actually composes a large matrix. Providing the measurements are error-free, the elements of this matrix show certain consistencies. Taking advantage of these consistencies, an innovative method is developed to detect and correct errors in the array resistivity logging tool raw measurements, and evaluate the quality of the data. The method can be described in several steps. First, data consistency patterns are identified based on the physics of the measurements. Second, the measurements are compared against the consistency patterns for error and bad data detection. Third, the erroneous data are eliminated and the measurements are re-constructed according to the consistency patterns. Finally, the data quality is evaluated by comparing the raw measurements with the re-constructed measurements. The method can be applied to all array type logging tools, such as array induction tool and array resistivity tool. This paper describes the method and illustrates its application with the High Definition Lateral Log （HDLL, Baker Atlas） instrument. To demonstrate the efficiency of the method, several field examples are shown and discussed.

A Method for Surveying Control Network Optimization Based on Reliability Properties

Surveying control network optimization design is related to standards, such as precision, reliability, sensitivity and the cost, and these standards are related closely to each other. A new method for surveying control network simulation optimization design is proposed. This method is based on the inner reliability index of the observation values.

Hybrid particle swarm optimization with differential evolution and chaotic local search to solve reliability-redundancy allocation problems

In order to solve reliability-redundancy allocation problems more effectively, a new hybrid algorithm named CDEPSO is proposed in this work, which combines particle swarm optimization （PSO） with differential evolution （DE） and a new chaotic local search. In the CDEPSO algorithm, DE provides its best solution to PSO if the best solution obtained by DE is better than that by PSO, while the best solution in the PSO is performed by chaotic local search. To investigate the performance of CDEPSO, four typical reliability-redundancy allocation problems were solved and the results indicate that the convergence speed and robustness of CDEPSO is better than those of PSO and CPSO （a hybrid algorithm which only combines PSO with chaotic local search）. And, compared with the other six improved meta-heuristics, CDEPSO also exhibits more robust performance. In addition, a new performance was proposed to more fairly compare CDEPSO with the same six improved recta-heuristics, and CDEPSO algorithm is the best in solving these problems.

Slack-Decode Simultaneously and Redundantly Threaded Architecture

Slack-Decode Simultaneously and Redundantly Threaded （SD-SRT） is proposed for detecting transient faults in processors. SD-SRT boosts the previously proposed SRT performance via definitely eliminating redundant instructiou fetches. First, the fetch stage is moved out of the Spheres of Replication （SoR）, and a unified instruction-fetch-queue （IFQ） is exploited by both the leading and trailing threads. Second, a scheme called slack-decode cooperates with the unified IFQ to harmonize proceeding of the two threads. The simulations show that SD-SRT outperforms original SRT in terms of IPC by 15%, and decreases I-cache access by 42%. Meanwhile, SD-SRT leads to a lessened size and complexity for hardware structures such as load-value-queue and store-buffer.

Fault tolerant motion planning based on joint torque limit for redundant manipulators

First, two fault tolerant planning algorithms with avoidance of joint static torque limit or joint dynamic torque limit are proposed respectively. The former is suitable for the low-speed manipulators, and the latter is suitable for the high-speed manipulators. These algorithms not only can insure manipulation tasks to lie within the fault tolerant workspace but also can avoid joint torque limit, and hence can insure a redundant manipulator to be. fault tolerant in both kinematical sense and dynamic sense. Then, the simulation examples for a planar 3R manipulator demonstrate the validity of these algorithms.

A UNIVERSAL ALGORITHM FOR PARALLEL CRC COMPUTATION AND ITS IMPLEMENTATION

Derived from a proposed universal mathematical expression, this paper investigates a novel algo-rithm for parallel Cyclic Redundancy Check (CRC) computation, which is an iterative algorithm to update the check-bit sequence step by step and suits to various argument selections of CRC computation. The algorithm proposed is quite suitable for hardware implementation. The simulation implementation and performance analysis suggest that it could efficiently speed up the computation compared with the conventional ones. The algorithm is implemented in hardware at as high as 21Gbps, and its usefulness in high-speed CRC computa-tions is implied, such as Asynchronous Transfer Mode (ATM) networks and 10G Ethernet.

A ROBUST ADAPTIVE VIDEO ENCODER BASED ON HUMAN VISUAL MODEL

A Robust Adaptive Video Encoder (RAVE) based on human visual model is proposed. The encoder combines the best features of Fine Granularity Scalable (FGS) coding, framedropping coding, video redundancy coding, and human visual model. According to packet loss and available bandwidth of the network, the encoder adjust the output bit rate by jointly adapting quantization step-size instructed by human visual model, rate shaping, and periodically inserting key frame. The proposed encoder is implemented based on MPEG-4 encoder and is compared with the case of a conventional FGS algorithm. It is shown that RAVE is a very efficient robust video encoder that provides improved visual quality for the receiver and consumes equal or less network resource. Results are confirmed by subjective tests and simulation tests.

Joint Source-Channel Decoding of EVRC Speech Encoder Using Residual Redundancy

The enhanced variable rate codec (EVRC) is a standard for the 'Speech ServiceOption 3 for Wideband Spread Spectrum Digital System,' which has been employed in both IS-95cellular systems and ANSI J-STC-008 PCS (personal communications systems). This paper concentrateson channel decoders that exploit the residual redundancy inherent in the enhanced variable ratecodec bitstream. This residual redundancy is quantified by modeling the parameters as first orderMarkov chains and computing the entropy rate based on the relative frequencies of transitions.Moreover, this residual redundancy can be exploited by an appropriately 'tuned' channel decoder toprovide substantial coding gain when compared with the decoders that do not exploit it. Channelcoding schemes include convolutional codes, and iteratively decoded parallel concatenatedconvolutional 'turbo' codes.

Zooplankton community structure in relation to environmental factors in the coastal water near Luan River Estuary, China

The seasonal and spatial variations of zooplankton community and theircorrelation with environmental factors were studied at nineteen sites in the coastalwater near Luan River Estuary. A total of 25 taxa of zooplankton were identified, amongwhich copepods being the most abundant groups (93.6% and 74.9% of totalabundance in spring and summer, respectively). Copepoda species assemblage wasthe same in spring and summer: Paracalanus parvus and Acartia bifilosa being thepredominant species, occupied more than 15% of total copepoda abundance.Zooplankton abundance was higher in spring than in summer, with an average of11 657 ind/m3 and 1549 ind/m3, respectively. One-way analysis of variance (ANOVA)showed that there was a significant difference of total zooplankton abundance betweenspring and summer (p<0.001). Redundancy analysis (RDA) revealed that salinity andnutrient were the main environmental factors influencing zooplankton group’sdistribution in spring and summer, respectively.