基于∑-△转换器并集成了电流和温度传感功能的IGBT模块

市场的需求推动了系统集成在功率电子行业中的发展。本文将IGBT模块集成精确的电阻取样(如英飞凌MIPAQ^(TM)系列)与IGBT片上电流检测功能进行比较。同时对通过采用DBC上集成的NTC热敏电阻测量方法和通过IGBT片上集成的温度检测二极管测量方法进行了比较。接下来,在模块内部还采用∑-△转换器和无磁芯变压器技术对取样的信号进行转换和隔离传输。

A Piecewise Linear Slope Compensation Circuit for DC-DC Converters

To prevent sub-harmonic oscillation and improve the stability and load capacity of the system,a piecewise linear slope compensation circuit is designed. Compared with the traditional design, this circuit provides a compensation signal whose slope varies from different duty cycles at - 40-85℃ ,and reduces the negative effect of slope compensation on the system＇s load capacity and transient response. A current mode PWM Boost DC-DC converter employing this slope compensation circuit is implemented in a UMC 0.6μm-BCD process. The results indicate that the circuit works well and effectively,and the load capacity is increased by 20%. The chip area of the piecewise linear slope compensation circuit is 0.01mm^2 ,which consumes only 8μA quiescent current,and the efficiency ranges up to 93%.

A Current-Mode DC-DC Buck Converter with High Stability and Fast Dynamic Response

A current-mode DC-DC buck converter with high stability is presented. The loop gain＇s expression of the current-mode converter is derived by employing an advanced model of a current-mode control converter. After analyzing the loop gain＇s expression, which illustrates the method of selecting suitable frequency compensation for the control loop,a novel pole-zero tracking frequency compensation is proposed. Based on theoretical analysis, a DC-DC buck converter with high stability is designed with 0.5μm-CMOS technology. The simulated results reveal that the stability of the converter is independent of the load current and the input voltage. Moreover,the converter provides a full load transient response setting time of less than 5μs and overshoots and undershoots of less than 30mV.

ZCT Scheme of Push-Pull Forward Converter

The paper proposes a novel zero current transition (ZCT) push pull forward converter. The auxiliary resonant cell is in parallel with the main circuit and the zero current switching (ZCS) range of the main and the auxiliary switches of the proposed converter are entirely achieved. The resonant capacitor achieves high voltage by operating the auxiliary cell. The auxiliary switch turns on before the main switches turn off, the high voltage of resonant capacitor blanks off the rectifier, and then the curr...

Design and Implementation of a Novel Area-Efficient Interpolator

This paper presents the design considerations and implementation of an area-efficient interpolator suitable for a delta-sigma D/A converter. In an effort to reduce the area and design complexity, a method for designing an FIR filter as a tapped cascaded interconnection of identical subfilters is modified. The proposed subfilter structure further minimizes the arithmetic number. Experimental results show that the proposed interpolator achieves the design specification,exhibiting high performance and hardware efficiency,and also has good noise rejection capability. The interpolation filter can be applied to a delta-sigma DAC and is fully functional.

A 12bit 300MHz Current-Steering CMOS D/A Converter

The proposed DAC consists of a unit current-cell matrix for 8MSBs and a binary-weighted array for 4LSBs,trading-off between the precision,speed,and size of the chip.In order to ensure the linearity of the DAC,a double Centro symmetric current matrix is designed by the Q2 random walk strategy.To achieve better dynamic performance,a latch is added in front of the current switch to change the input signal,such as its optimal cross-point and voltage level.For a 12bit resolution,the converter reaches an update rate of 300MHz.

High-SpeedReal-TimeDataAcquisitionSystem Realized by Interleaving/Multiplexing Technique

The interleaving/multiplexing technique was used to realize a 200?MHz real time data acquisition system. Two 100?MHz ADC modules worked parallelly and every ADC plays out data in ping pang fashion. The design improved the system conversion rata to 200?MHz and reduced the speed of data transporting and storing to 50?MHz. The high speed HDPLD and ECL logic parts were used to control system timing and the memory address. The multi layer print board and the shield were used to decrease interference produced by the high speed circuit. The system timing was designed carefully. The interleaving/multiplexing technique could improve the system conversion rata greatly while reducing the speed of external digital interfaces greatly. The design resolved the difficulties in high speed system effectively. The experiment proved the data acquisition system is stable and accurate.

Design of Tapered Rib Spot-Size Converter with Double-Cladding Structure

A novel structure of spot size converter is designed to allow low loss and large alignment tolerance between single mode rib waveguide devices and fiber arrays theoretically.The spot size converter consists of a tapered rib core region and a double cladding region.Through optimizing parameters,an expanded mode field can be tightly confined in the inner cladding and thus radiation loss be reduced largely at the tapered region.The influence of refractive index and thickness of the inner cladding on coupling loss is analyzed in particular.A novel,easy method of fabricating tapered rib spot size converter based on silicon on insulator material is proposed.

1.5μm Self-Aligned Spotsize Converter Integrated DFB Fabricated by Selective Area Grown MOVPE

High performance 1 57μm spotsize converter monolithically integrated DFB is fabricated by the technique of self aligned selective area growth.The upper optical confinement layer and the butt coupled tapered thickness waveguide are regrown simultaneously,which not only offeres the separated optimization of the active region and the integrated spotsize converter,but also reduces the difficulty of the butt joint selective regrowth.The threshold current is as low as 4 4mA.The output power at 49mA is 10 1mW.The side mode suppression ratio (SMSR) is 33 2dB.The vertical and horizontal far field divergence angles are as small as 9° and 15° respectively,the 1dB misalignment tolerance are 3 6μm and 3 4μm.

Monolithically Integrated Laser Diode and Electroabsorption Modulator with Dual-Waveguide Spot-Size Converter Output

A 1.60μm laser diode and electroabsorption modulator monolithically integrated with a novel dual-waveguide spot-size converter output for low-loss coupling to a cleaved single-mode optical fiber are demonstrated.The devices emit in a single transverse and quasi single longitudinal mode with an SMSR of 25.6dB.These devices exhibit a 3dB modulation bandwidth of 15.0GHz,and modulator DC extinction ratios of 16.2dB.The output beam divergence angles of the spot-size converter in the horizontal and vertical directions are as small as 7.3°×18.0°,respectively,resulting in a 3.0dB coupling loss with a cleaved single-mode optical fiber.

A Dual Source Power Based EV Wireless Charging System

Recently,there has been a huge increase in the usage of fuel resources for automobiles which is severely affecting the climate and causing global warming.The use of electric vehicle(EV)is an effective way to protect the environment and reduce travel costs.However,the EV charging system has a single charging source,and the charging rate is limited.In this paper,an EV wireless charging system based on dual source power supply has been developed.It realizes intelligent switching between 12 V photovoltaic output and 220 V AC dual source power,and has wireless transmission function.Based on the proposed power supply architecture,the micro wireless charging model is built,which enables the EV model to store power and realize static and mobile control through the wireless induction charging system.

An Electroabsorption Modulator Monolithically Integrated with a Semiconductor Optical Amplifier and a Dual-Waveguide Spot-Size Converter

A semiconductor optical amplifier and electroabsorption modulator monolithically integrated with a spotsize converter input and output is fabricated by means of selective area growth,quantum well intermixing,and asymmetric twin waveguide technology. A 1550-1600nm lossless operation with a high DC extinction ratio of 25dB and more than 10GHz 3dB bandwidth are successfully achieved. The output beam divergence angles of the device in the horizontal and vertical directions are as small as 7.3°× 18.0°, respectively, resulting in a 3.0dB coupling loss with a cleaved single-mode optical fiber.

Integrated Delta-Sigma 1.5bit Power DAC with 100dB Dynamic Range

A stereo 1.5bit delta-sigma digital-analog converter （△∑ DAC） integrated with a filterless class D power amplifier is introduced. It consumes no static power, and its maximum output power is 436mW with an 8Ω load. Its output dynamic range exceeds 100dB. The circuit is implemented with a TSMC 0. 18μm process. The die area is 0. 28mme. The supply voltage is 1. gV for the digital part and 3.3V for class D.

Capacitor self-calibration technique used in time-interleaved successive approximation ADC

A capacitor self-calibration circuit used in a successive approximation analog-to-digital converter （SA-ADC） is presented. This capacitor self-calibration circuit can calibrate erroneous data and work with the ADC by adding an additional clock period. This circuit is used in a 10 bit 32 Msample/s time-interleaved SA- ADC. The chip is implemented with Chart 0. 25 μm 2. 5 V process and totally occupies an area of 1.4 mm× 1.3 mm. After calibration, the simulated signal-to-noise ratio （SNR） is 59. 586 1 dB and the spurious-free dynamic range （SFDR） is 70. 246 dB at 32 MHz. The measured signal-to-noise and distortion ratio （SINAD） is 44. 82 dB and the SFDR is 63. 760 4 dB when the ADC samples a 5.8 MHz sinusoid wave.

1.55μm Laser Diode Monolithically Integrated with Spot-Size Converter Using Conventional Process

A novel 1 55μm laser diode with spot size converter is designed and fabricated using conventional photolithography and chemical wet etching process.For the laser diode,a ridge double core structure is employed.For the spot size converter,a buried ridge double core structure is incorporated.The laterally tapered active core is designed and optically combined with the thin and wide passive core to control the size of mode.The laser diode threshold current is measured to be 40mA together with high slop efficiency of 0 35W/A.The beam divergence angles in the horizontal and vertical directions are as small as 14 89°×18 18°,respectively,resulting in low coupling losses with a cleaved optical fiber (3dB loss).

Error modeling of 3-RSR parallel robot based on D-H transformation matrix

By selecting any one limb of 3-RSR parallel robot as a research object, the paper establishes a position and orienta- tion relationship matrix between the moving platform and the base by means of Denavit-Hartenberg （D-H） transformation matrix. The error mapping model is derived from original error to the error of the platform by using matrix differential method. This model contains all geometric original errors of the robot. The nonlinear implicit function relation between po- sition and orientation error of the platform and the original geometric errors is simplified as a linear explicit function rela- tion. The results provide a basis for further studying error analysis and error compensation.

A Novel Sampling Switch Suitable for Low-Voltage Analog-to-Digital Converters

A novel, highly linear sampling switch suitable for low-voltage operation is proposed. This switch not only eliminates the nonlinearity introduced by gate-source voltage variation, but also reduces the nonlinearity resuiting from threshold voltage variation, which has not been accomplished in earlier low-voltage sampling switches. This is achieved by adopting a replica transistor with the same threshold voltage as the sampling transistor. The effectiveness of this technique is demonstrated by a prototype design of a sampling switch in 0. 35μm. The proposed sampling switch achieves a spurious free dynamic range of 111dB for a 0. 2MHz, 1.2Vp-p input signal, sampled at a rate of 2MS/s,about 18dB over the Bootstrapped switch. Also, the on-resistance variation is reduced by 90%. This method is especially useful for low-voltage, high resolution ADCs, which is a hot topic today.

Mine-used multi-function serial signal converter based on Ethernet

A mine-used multi-function serial signal converter is introduced.This converter is based on Ethernet.The core of this design is embedded microprocessor STM32F107VCT6.Embedded operation system μC/OS-Ⅱ is transplanted into this converter,and light-weight Internet protocal （LwIP） stack is also embedded to realize mutual conversion of serial signals such as meter bus （M-Bus） signal,RS485 signal,RS232 signal and Ethernet signal.Interconnection between all kinds of monitoring system interfaces under coal mine can be formed easily,which can solve compatibility problem between monitoring system and communication system and improve overall performance of safety monitoring system.The designed multi-function serial signal converter is of great value for application,which is worthy to be popularized in coal mine safety production.

A Novel Multi-Stage Interpolation Filter Design Technique for High-Resolution Σ-Δ DAC

This paper presents an efficient way to implement an interpolation filter in a 20bit ∑-△ DAC with an oversampling ratio of 128. A multistage structure is used to reduce the complexity of filter coefficients and the fi- nite word length effect. A novel method based on mixed-radix number representation is proposed to realize a poly- phase multiplier-free half-band subfilter with a high resolution. This approach reduces the complexity of the con- trol system and saves chip area dramatically. The IC is realized in a standard 0.13μm CMOS process and the inter- polation filter occupies less than 0.63mm^2 . This realization has desirable properties of regularity with simple hard- ware devices which are suitable for VLSI and can be applied to many other high resolution data converters.

Prediction of Breakdown Voltage of Asymmetric Linearly-Graded Junction by Equivalent Doping Profile Transformation Method

This report describes an equivalent doping profile transformation method with which the avalanche breakdown voltage of the asymmetric linearly graded junction was analytically predicted.The maximum breakdown voltage and the different depletion layer extension on the diffused side and substrate side are demonstrated in the report.The report shows the equivalent doping profile method is valid to predict the breakdown voltage of the complex P N junction.The analytical results agree with the experimental breakdown voltage in comparison with the abrupt junction and symmetric linearly graded junction approximations.