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应用FFT计算△Σ调制器信噪比的分析
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作者 欧书琴 陈军 《安徽科技学院学报》 2015年第2期57-62,共6页
针对许多设计者存在错误使用快速傅里叶变换计算△Σ调制器输出信号信噪比的问题,在分析△Σ调制器工作原理和推导计算△Σ调制器信噪比理论模型的基础之上,详细地阐述了使用快速傅里叶变换计算△Σ调制器信噪比和绘制其功率谱密度的过... 针对许多设计者存在错误使用快速傅里叶变换计算△Σ调制器输出信号信噪比的问题,在分析△Σ调制器工作原理和推导计算△Σ调制器信噪比理论模型的基础之上,详细地阐述了使用快速傅里叶变换计算△Σ调制器信噪比和绘制其功率谱密度的过程。以二阶△Σ调制器为例,在MATLAB和Simulink环境中完成了信噪比的计算和功率谱密度的绘制,实验结果证明了所述方法的正确性,对正确设计△Σ调制器具有重要的实际应用价值。 展开更多
关键词 △σ调制器 信噪比 过采样 噪声整形 窗函数 功率谱密度 噪声带宽
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A 16bit 96kHz Chopper-Stabilized Sigma-Delta ADC 被引量:1
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作者 曹楹 任腾龙 洪志良 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第8期1204-1210,共7页
A 16bit sigma-delta audio analog-to-digital converter is developed.It consists of an analog modulator and a digital decimator.A standard 2-order single-loop architecture is employed in the modulator.Chopper stabilizat... A 16bit sigma-delta audio analog-to-digital converter is developed.It consists of an analog modulator and a digital decimator.A standard 2-order single-loop architecture is employed in the modulator.Chopper stabilization is applied to the first integrator to eliminate the 1/f noise.A low-power,area-efficient decimator is used,which includes a poly-phase comb-filter and a wave-digital-filter.The converter achieves a 92dB dynamic range over the 96kHz audio band.This single chip occupies 2.68mm2 in a 0.18μm six-metal CMOS process and dissipates only 15.5mW power. 展开更多
关键词 sigma-delta modulation chopper stabilize decimator poly phase wave digital filter on-chip noise
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COMPARISON OF SIGMA-DELTA MODULATOR FOR FRACTIONAL-N PLL FREQUENCY SYNTHESIZER
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作者 Mao Xiaojian Yang Huazhong Wang Hui 《Journal of Electronics(China)》 2007年第3期374-379,共6页
This paper investigates the design of digital Sigma-Delta Modulator (SDM) for fractional-N frequency synthesizer. Characteristics of SDMs are compared through theory analysis and simulation. The curve of maximum-loop-... This paper investigates the design of digital Sigma-Delta Modulator (SDM) for fractional-N frequency synthesizer. Characteristics of SDMs are compared through theory analysis and simulation. The curve of maximum-loop-bandwidth vs. maximum-phase-noise is suggested to be a new criterion to the performance of SDM,which greatly helps designers to select an appropriate SDM structure to meet their real application requirements and to reduce the cost as low as possible. A low-spur 3-order Mul-tistage Noise Shaping (MASH)-1-1-1 SDM using three 2-bit first-order cascaded modulators is proposed,which balances the requirements of tone-free and maximum operation frequency. 展开更多
关键词 FRACTIONAL-N Frequency synthesizer Phase Locked Loop (PLL) Sigma-Delta Modulator(SDM)
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High-Consistency Behavior Modeling of a Switched-Capacitor Sigma-Delta Modulator in SIMULINK
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作者 欧伟 吴晓波 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第11期2209-2217,共9页
To improve the simulation accuracy of SIMULINK, a novel inclusive behavior model of an integrator is proposed that introduces the effects of different circuit nonidealities of a switched-capacitor sigma-delta modulato... To improve the simulation accuracy of SIMULINK, a novel inclusive behavior model of an integrator is proposed that introduces the effects of different circuit nonidealities of a switched-capacitor sigma-delta modulator into SIMULIK simulation. The nonlinear DC gain and nonlinear settling process are introduced into the op-amp module. The signaldependent charge injection and nonlinear resistance are introduced into the switch module. In addition, the noise source including flicker and thermal noise is introduced into system as an independent module. The novel model is verified by SIMULINK behavioral simulations. The results are compared with results from circuit level simulation in Cadence SPICE using TSMC 0.35μm mixed signal technology. It shows that the novel model succeeds in introducing the influences of the nonidealities into behavior simulation to more realistically describe the circuit performances and increase the accuracy of SIMULINK simulation. 展开更多
关键词 sigma-delta modulator nonlinear DC gain feed-through slewing distortion phase margin charge injection
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