由《程器》观《风骨》——刘勰文学思想的社会文化背景考析

刘勰的风骨论 ,有两种研究途径 :一是对风骨范畴的确切含义的探讨 ,二是对风骨理论形成的文化背景考察。在《文心雕龙》一书中 ,《程器》与《风骨》论世论文 ,一为社会批评一为文学批评 ,完整表达出作者贵器用、尚风骨的文学审美态度。刘勰的社会批评思想深刻影响着他的文学批评理论 ,可以说《程器》是社会批评中的风骨论 ,《风骨》则是文学批评中的程器说。由《程器》观《风骨》 ,涉及三个问题 :(1)文学批评是作者社会批评的行为方式 ,(2 )贵器用具体到文学准则即重风骨 ,(3)刘勰的文学观念体现了“尚北宗南”。

浅探《程器》篇创作意图

《程器》篇作为《文心雕龙》的最后一篇,在全书的结构上有着独特的地位,并且《程器》篇有着与众不同的论述重心,关于《程器》篇真正的创作意图,目前依然存在争议。因此在本文中,笔者计划从各家观点、刘勰生活的时代背景及人生经历、《程器》篇的文章结构三个方面进行分析,探讨《程器》篇的创作意图。

《文心雕龙·程器》“程文”说

《程器》论述士人的品德和才能,这是《文心雕龙》注释家共论。这样的释义与本篇所居“批评论”之末的位理难合,也不能确认其“批评论”资格。“程器”实质上是通过纠正时俗对文人的偏见,阐明“文采”广泛作用于全体社会成员的“成务为用”功能,即整体评价文的意义。只有作这样的延伸意义理解,才能辨明《程器》篇的“批评论”性质。位居全书最后,正是与首篇《原道》起句“文之为德也大矣”相呼应,回环闭合,体现全书“体大虑周”的篇章结构的严密组织。

Predictive maintenance and its applications in civil engineering structures:A review

Structural health monitoring and performance prediction are crucial for smart disaster mitigation and intelligent management of structures throughout their lifespan.Recent advancements in predictive maintenance strategies within the industrial manufacturing industry have inspired similar innovations in civil engineering,aiming to improve structural performance evaluation,damage diagnosis,and capacity prediction.This review delves into the framework of predictive maintenance and examines various existing solutions,focusing on critical areas such as data acquisition,condition monitoring,damage prognosis,and maintenance planning.Results from real-world applications of predictive maintenance in civil engineering,covering high-rise structures,deep foundation pits,and other infrastructure,are presented.The challenges of implementing predictive maintenance in civil engineering structures under current technology,such as model interpretability of data-driven methods and standards for predictive maintenance,are explored.Future research prospects within this area are also discussed.

Role-Based Modeling in Enterprise Dynamic Alliance

In enterprise dynamic alliance towards agile manufacturing systems, any group needs to know which activities it must take part in, in what order those activities take place and how many other groups it must interact with. The traditional procedural models can’t meet the requirement of the modeling for an enterprise dynamic alliance. In this paper, we use role based models for an enterprise modeling. Role based models group activities into roles, which describe the desired behavior of individual enterprise. We have developed a graphical modeling tool built on Web/DCOM platform according to Petri net theory and role based methodology.

A Programmable 2.4GHz CMOS Multi-Modulus Frequency Divider

A programmable multi-modulus frequency divider is designed and implemented in a 0. 35μm CMOS process. The multi-modulus frequency divider is a single chip with two dividers in series,which are divided by 4 or 5 prescaler and by 128-255 multi-modulus frequency divider. In the circuit design, power and speed trade-offs are analyzed for the prescaler, and power optimization techniques are used according to the input frequency of each divider cell for the 128-255 multimodulus frequency divider. The chip is designed with ESD protected I/O PAD. The dividers chain can work as high as 2.4GHz with a single ended input signal and beyond 2.6GHz with differential input signals. The dual-modulus prescaler consumes 11mA of current while the 128-255 multi-modulus frequency divider consumes 17mA of current with a 3.3V power supply. The core area of the die without PAD is 0.65mm × 0.3mm. This programmable multi-modulus frequency divider can be used for 2.4GHz ISM band PLL-based frequency synthesizers. To our knowledge, this is the first reported multi-modulus frequency divider with this structure in China.

Design of Down Scalers in Mixed-Signal GHz Frequency Synthesizer

An optimized method is presented to design the down scalers in a GHz frequency synthesizer. The down scalers are comprised of dual modulus prescaler （DMP） and programmable ＆ pulse swallow divider,different methods of high frequency analog circuit and digital logical synthesis are adopted respectively. Using a DMP high speed, lower jitter and lower power dissipation are obtained,and output frequency of 133.0MHz of the DMP working at divide-by-8 shows an RMS jitter less than 2ps. The flexibility and reusability of the progrs, mmable divider is high;its use could be extended to many complicated frequency synthesizers. By comparison,it is a better design on performance of high-frequency circuit and good design flexibility.

Initial Alignment Technique for SINS of Vehicles in the Moving State

An initial alignment technique for the strapdown inertial navigation system (SINS) of vehicles in the moving state is researched. By selecting an odometer as the system’s external sensor, the mathematical model for the alignment in the moving state is established and the observability of the system is analyzed. The results show that the SINS can successfully achieve the precision alignment in 10 min when the vehicle is moving toward the prearranged place after its staying for several seconds to perform the coarse alignment. The precision of alignment can also be improved in the moving state compared with that in the static state.

Relocation method of microseismic source in deep mines

A new method, named relocation, was proposed to reduce the impact of sensor errors systematically, especially whenavailable data of sensors are abundant. The procedure includes evaluating the reliability of every sensors datum, processing the initiallocation by the credible data, and selecting a set of equations with optimal noise tolerance according to the relative relationshipbetween the initial location and sensors location, then calculating the final location by k-mean voting. The results obtained in thisresearch include comparing traditional location method with the presented method in both simulation and field experiment. In thefield experiment, the location error of relocation method reduced 41.8% compared with traditional location method. The resultssuggested that relocation method can improve the fault-tolerant performance significantly.

Key technologies of frequency-hopping frequency synthesizer for Bluetooth RF front-end

A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency （RF） front-end is presented,and design of a voltage controlled oscillator （VCO） and dual-modulus prescaler are focused on.It is fabricated in a 0.18 μm mixed-signal CMOS （complementary metal-oxide-semiconductor transistor） process.The power dissipation of VCO is low and a stable performance is gained.The measured phase noise of VCO at 2.4 GHz is less than -114.32 dBc/Hz.The structure of the DMP is optimized and a novel D-latch integrated with ＂OR＂ logic gate is used.The measured results show that the chip can work well under a 1.8 V power supply.The power dissipation of the core part in a dual modulus prescaler is only 5.76 mW.An RMS jitter of 2 ps is measured on the output signal at 118.3 MHz.It is less than 0.02% of the clock period.

Force assistant master-slave telerehabilitation robotic system

A prototype of the master slave telerehabilitation robotic system with force feedback is developed. This system contains a pair of robots with the master being operated by the therapist and the slave following the master to guide the patients to exercise. A slave device with a slave controller is designed to stretch and mobilize the impaired elbow joints accurately and safely. A master device with a master controller is designed to control/monitor the procedure of treatment and assess the outcome of treatment remotely and accurately. By using the twoport network theory and the circuit equivalent impedance models, the position-force control scheme is designed to generate force feedback for the therapist who is to be informed of the interaction force between the subject and the robot arm during exercise. Experiments were conducted with a healthy male. Results show that the therapist can guide the patient to exercise by the master arm and can feel the interaction forces between the impaired arm and the robot. Compared with the traditional therapy, this system is more cost-efficient, more convenient and safer for both the stroke patients and the clinicians.

Low Jitter,Dual-Modulus Prescalers for RF Receivers

Dual-modulus prescalers （DMP） for RF receivers are studied. An improved D-latch is proposed to increase the speed and the driving capability of the DMP. A novel D-latch architecture integrated with ‘OR＇ logic is proposed to decrease the complexity of the circuit. A divided-by-16/17 DMP for application in a digital video broadcasting-terrestrial receiver is realized with a TSMC 0.18μm mixed-signal CMOS process. The programmable ＆ pulse swallow divider in this receiver is designed with a 0.18μm CMOS standard cell library and realized in the same process. The measured results show that the DMP has an output jitter of less than 0.03% and works well with the programmable ＆ pulse swallow divider.

Design of PLC control system of RTG spreader in Qingdao Port Container Terminal

The control method of rubber tyre gantry （RTG） spreader in Qingdao Port Container Terminal is logic board control,which has many shortcomings such as expensive spare parts and high faults.This paper designs a new control system using programmable logic controller （PLC） centralized control to replace the original logic board control.The new system mainly contains complete ELME spreader control scheme design,hardware selection and PLC control program development.Its field application shows that the system has characteristics of high efficiency,low running cost,easy maintenance.

Nonlinear online process monitoring and fault diagnosis of condenser based on kernel PCA plus FDA

A novel online process monitoring and fault diagnosis method of condenser based on kernel principle component analysis （KPCA） and Fisher discriminant analysis （FDA） is presented. The basic idea of this method is： First map data from the original space into high-dimensional feature space via nonlinear kernel function and then extract optimal feature vector and discriminant vector in feature space and calculate the Euclidean distance between feature vectors to perform process monitoring. Similar degree between the present discriminant vector and optimal discriminant vector of fault in historical dataset is used for diagnosis. The proposed method can effectively capture the nonlinear relationship among process variables. Simulating results of the turbo generator＇s fault data set prove that the proposed method is effective.

A Novel Non-Planar Cell Structure for Flash Memory

Proposed herein is a novel non planar cell structure for flash memory which has been fabricated to achieve high programming speed with low operating voltage.This memory cell preserves a simple stacked gate structure which only requires an additional masking step to form the novel structure in the channel.For the cell of the 1 2μm gate length,the programming speed of 43μs under the measuring condition of V g=15V, V d=5V,and the erasing time of 24ms under V g=-5V, V s=8V are obtained.The programming speed is faster than that of the conventional planar cell structure.This superior programming speed makes it suitable for high speed application.

0.18μm CMOS programmable frequency divider design for DVB-T

The implementation of a programmable frequency divider, which is one of the components of the phase-locked loop （PLL） frequency synthesizer for digital video broadcastingterrestrial （DVB-T） and other modem communication systems, is presented. By cooperating with a dual-modulus prescaler, this divider can realize an integer frequency division from 926 to 1 387. Besides the traditional standard cell design flow, such as logic synthesis, placement and routing, the interactions between front-end and back-end are also considered to optimize the design flow under deep submicron technology. By back-annotating the back-end information to front-end design, a custom wire-load model is created which is more practical compared with the default model. This divider has been fabricated in TSMC 0. 18μm CMOS technology using Artisan standard cell library. The chip area is 675 μm × 475 μm and the power consumption is about 2 mW under a 1.8 V power supply. Measurement results show that it works correctly and can realize a frequency division with high precision.

SCDI Flash Memory Device Ⅰ: Simulation and Analysis

Step channel direct injection(SCDI)flash memory device which had been developed changes the hot carrier injection method by making a shallow step in the middle of channel .Therefore high speed for programming,high efficiency for injection,and lower working voltage are obtained.Simulation and analysis for the proposed SCDI structure device are done and an optimization scheme to improve the utmost performance of SCDI device is given...

BACKGROUND KNOWLEDGE AND SECONDARY KNOWLEDGE BASES IN LEARNINGS YSTEMS

This paper presents the differences and relations between background knowledge and domain theories in learning systems. The roles they play during learning procedures are discussed. It is emphasized that background knowledge plays an important role in enhancing the ability of a learning system. An explanation based learning system with domain theory in primary knowledge base and background knowledge in secondary knowledge base is introduced as an example. It shows how background knowledge can be used to solve some of the problems caused by incomplete domain theory in an explanation based learning system. The system can accomplish knowledge level learning through purely deductive approach. At last the acquisition of background knowledge is briefly discussed.

SCDI Flash Memory Device Ⅱ:Experiments and Characteristics

Step channel direct injection(SCDI) flash memory device is successfully achieved by 1 2μm CMOS technology,moreover good performance is obtained.At the bias condition of V g=6V, V d=5V,the programming speed of SCDI device is 42μs.Under the condition of V g=-8V, V s=8V,the erasing speed is 24ms.Compared with the same size of conventional flash memory device whose corresponding parameters are 500μs and 24ms,respectively,the performance of SCDI device is remarkably improved.During manufacturing of SCDI device,the key technologies are to make the shallow step with appropriate depth and angle,along with eliminating the etch damage during the process of Si 3N 4 spacer.

The Key Techniques of VHDL Parser's Automatic Generation

VHDL and its supporting environment are active domain in the field of logic design.In the paper the design principle and some key techniques to solve the problems on the implementation of the VHDL parser are introduced. According to the methods discussed in the paper, the VHDL parser based on VHDL IEEE 1076 standard version is implemented and a series of strict tests are done. This VHDL parser is front-end tool of the VHDL high level synthesis and mixed level simulation system developed by the Research Center of ASIC of BIT.