It may come as a shock, but Kate Middleton and Prince William have "split" less than one month before they are due to tie the knot. A new stamp officially released by New Zealand Post and sold in the South
In this paper,the replication process of large area nanoimprint stamp with small critical dimension(CD) loss was investigated,using the thin residual layer nanoimprint lithography(NIL) technology.The residual layer th...In this paper,the replication process of large area nanoimprint stamp with small critical dimension(CD) loss was investigated,using the thin residual layer nanoimprint lithography(NIL) technology.The residual layer thickness was optimized by changing the spin-coated resist thickness.The dependences of the residual layer etching rate on gas flow,chamber pressure,and RF power were investigated,and the optimized process conditions were established.By means of the thin residual layer NIL technique and optimized residual layer etching process,large area stamp with small CD loss and multi-orientation patterns was successfully replicated on 2-inch SiO2/Si wafer.The CD loss was controlled within 5 nm.The replicated stamp showed high performance in the patterning with thermal NIL.The replication process reported in this work could also be used to fabricate large area nanostructures with small CD loss.展开更多
The broad availability of high throughput nanostructure fabrication is essential for advancement in nanoscale science. Large-scale manufacturing developed by the semiconductor industry is often too resource-intensive ...The broad availability of high throughput nanostructure fabrication is essential for advancement in nanoscale science. Large-scale manufacturing developed by the semiconductor industry is often too resource-intensive for medium scale laboratory prototyping. We demonstrate the inexpensive wafer scale direct- write of Ge and Si nanostructures with a 4-inch mask aligner retrofitted with a conducting microstructured stamp. A bias applied between the stamp and an underlying silicon substrate results in the reaction of diphenylgermane and diphenylsilane precursors at the stamp--substrate interface to yield the direct- write of Ge and Si nanostructures in determined locations. With the increasing number of outdated mask aligners available from the semiconductor industry and an extensive library of liquid precursors, this strategy provides facile, inexpensive, wafer scale semiconductor direct-write for applications such as electronics, photonics, and photovoltaics.展开更多
文摘It may come as a shock, but Kate Middleton and Prince William have "split" less than one month before they are due to tie the knot. A new stamp officially released by New Zealand Post and sold in the South
基金supported by the National Basic Research Program of China ("973" Program) (Grant No. 2011CB302105)the Fundamental Research Funds for the Central Universities (Grant No. DUT10ZD104)
文摘In this paper,the replication process of large area nanoimprint stamp with small critical dimension(CD) loss was investigated,using the thin residual layer nanoimprint lithography(NIL) technology.The residual layer thickness was optimized by changing the spin-coated resist thickness.The dependences of the residual layer etching rate on gas flow,chamber pressure,and RF power were investigated,and the optimized process conditions were established.By means of the thin residual layer NIL technique and optimized residual layer etching process,large area stamp with small CD loss and multi-orientation patterns was successfully replicated on 2-inch SiO2/Si wafer.The CD loss was controlled within 5 nm.The replicated stamp showed high performance in the patterning with thermal NIL.The replication process reported in this work could also be used to fabricate large area nanostructures with small CD loss.
文摘The broad availability of high throughput nanostructure fabrication is essential for advancement in nanoscale science. Large-scale manufacturing developed by the semiconductor industry is often too resource-intensive for medium scale laboratory prototyping. We demonstrate the inexpensive wafer scale direct- write of Ge and Si nanostructures with a 4-inch mask aligner retrofitted with a conducting microstructured stamp. A bias applied between the stamp and an underlying silicon substrate results in the reaction of diphenylgermane and diphenylsilane precursors at the stamp--substrate interface to yield the direct- write of Ge and Si nanostructures in determined locations. With the increasing number of outdated mask aligners available from the semiconductor industry and an extensive library of liquid precursors, this strategy provides facile, inexpensive, wafer scale semiconductor direct-write for applications such as electronics, photonics, and photovoltaics.
