A new hybrid FPGA architecture is proposed. The logic tile,which consists of a logic cluster and related connection boxes （CBs）, can be configured as either programmable logic arrays （PLAs） or look-up tables （LUT...A new hybrid FPGA architecture is proposed. The logic tile,which consists of a logic cluster and related connection boxes （CBs）, can be configured as either programmable logic arrays （PLAs） or look-up tables （LUTs）, This architecture can be classified as an AND-LUT array. PLAs are suitable for the implementation of high fan-in logic circuits, while LUTs are used to implement low fan-in logic circuits. As a result, the proposed hybrid FPGA architecture （HFA） is more flexible to improve logic density. Experiments based on MCNC benchmark circuits were performed in both the hybrid architecture and conventional LUT-based symmetrical FPGA architecture in term of area consumption. Preliminary results indicate that on average, the area is reduced by 46% using the new hybrid architecture.展开更多
文摘A new hybrid FPGA architecture is proposed. The logic tile,which consists of a logic cluster and related connection boxes （CBs）, can be configured as either programmable logic arrays （PLAs） or look-up tables （LUTs）, This architecture can be classified as an AND-LUT array. PLAs are suitable for the implementation of high fan-in logic circuits, while LUTs are used to implement low fan-in logic circuits. As a result, the proposed hybrid FPGA architecture （HFA） is more flexible to improve logic density. Experiments based on MCNC benchmark circuits were performed in both the hybrid architecture and conventional LUT-based symmetrical FPGA architecture in term of area consumption. Preliminary results indicate that on average, the area is reduced by 46% using the new hybrid architecture.
