We propose a new design scheme for a Booth encoder based on clocked transmission gate adiabatic logic(CTGAL). In the new design the structural complexity of the Booth encoder is reduced while the speed of the multipli...We propose a new design scheme for a Booth encoder based on clocked transmission gate adiabatic logic(CTGAL). In the new design the structural complexity of the Booth encoder is reduced while the speed of the multiplier is improved. The adiabatic two's complement multiplier-accumulator(MAC) is furthermore a design based on the CTGAL. The computer simulation results indicate that the designed circuit has the correct logic function and remarkably less energy consumption compared to that of the MAC based on complementary metal oxide semiconductor(CMOS) logic.展开更多
基金supported by the National Natural Science Foundation of China (No. 60776022)the Science and Technology Fund of Zhejiang Province (No. 2008C21166)+3 种基金the Key Scientific Research Fund of the Department of Education of Zhejiang Province (No. 20061666)the Professor Fund (No. JSL2007001)the Scientific Research Fund (No. XK0610030)the K. C. Wong Magna Fund in Ningbo University, China
文摘We propose a new design scheme for a Booth encoder based on clocked transmission gate adiabatic logic(CTGAL). In the new design the structural complexity of the Booth encoder is reduced while the speed of the multiplier is improved. The adiabatic two's complement multiplier-accumulator(MAC) is furthermore a design based on the CTGAL. The computer simulation results indicate that the designed circuit has the correct logic function and remarkably less energy consumption compared to that of the MAC based on complementary metal oxide semiconductor(CMOS) logic.
