In this paper, a high-performance and low-complexity luminance transient improvement （LTI） algorithm is proposed and efficiently implemented on field programmable gate army （FPGA） devices, which can be widely used...In this paper, a high-performance and low-complexity luminance transient improvement （LTI） algorithm is proposed and efficiently implemented on field programmable gate army （FPGA） devices, which can be widely used to enhance the sharpness of digital video. The proposed algorithm generates the cor- rection signal by using the difference of the outputs of two Gaussian filters with different variances, and then modulates the correction signal adaptively according to the local contrast information of video frames. A 2-D min/max nonlinear filter is employed to suppress overshoots around edges. The proposed algorithm is thoroughly confirmed by experiments and compared with other algorithms on irrkages, which produces steeper edges and better visual quality while suppressing noise and artifacts. And the hardware architecture suitable for FPGA implementation is optimized based on the property of the algorithm and proves to be effective and efficient in many respects, such as resource consumption, performance and reconfigura- bility. The specific implementation details on both Xilinx and Ahera FPGA devices are also described in this paper.展开更多
基金Supported by the National Science and Technology Support Projects Funded by Ministry of Science & Technology of China (No. 2006BAK07B04)
文摘In this paper, a high-performance and low-complexity luminance transient improvement （LTI） algorithm is proposed and efficiently implemented on field programmable gate army （FPGA） devices, which can be widely used to enhance the sharpness of digital video. The proposed algorithm generates the cor- rection signal by using the difference of the outputs of two Gaussian filters with different variances, and then modulates the correction signal adaptively according to the local contrast information of video frames. A 2-D min/max nonlinear filter is employed to suppress overshoots around edges. The proposed algorithm is thoroughly confirmed by experiments and compared with other algorithms on irrkages, which produces steeper edges and better visual quality while suppressing noise and artifacts. And the hardware architecture suitable for FPGA implementation is optimized based on the property of the algorithm and proves to be effective and efficient in many respects, such as resource consumption, performance and reconfigura- bility. The specific implementation details on both Xilinx and Ahera FPGA devices are also described in this paper.
