This paper proposes a cochlear prosthetic system with an implanted digital signal processor (DSP). This system transmits voice-band signals with a low data rate through the wireless link, free of the data-rate limit...This paper proposes a cochlear prosthetic system with an implanted digital signal processor (DSP). This system transmits voice-band signals with a low data rate through the wireless link, free of the data-rate limitation and suitable for future development. By optimizing the speech processing algorithm and the DSP hardware design, the implanted DSP manages to execute the continuous interleaved sampling (CIS) algorithm at a clock frequency of 3MHz and a power consumption of only 1.91mW. With an analytic power-transmission efficiency of the wireless inductive link (40%), the power overhead caused by the implanted DSP is derived as 2.87roW,which is trivial when compared with the power consumption of existing cochlear prosthetic systems (tens of milliwatts). With the DSP implanted,this new system can.be easily developed into a fully implanted cochlear prosthesis.展开更多
Wave equation wave field numerical modeling technology is applied to the observation that deep layer imaging is difficult below a screening layer of high-velocity basalt. Three simple high-velocity basalt models are d...Wave equation wave field numerical modeling technology is applied to the observation that deep layer imaging is difficult below a screening layer of high-velocity basalt. Three simple high-velocity basalt models are designed on the basis of basalt formation characteristics. The analysis of deep-layer reflection seismic signal energy shows that lowfrequency seismic signals are capable of both penetrating the thin high-velocity basalt layer and reducing the diffraction noise caused by the rough surfaces. The simulation experiment of a complete 2D basalt model confirms that the low-frequency signals can be used to boost the quality of deep-layer imaging under the high-velocity basalt layer and achieve good results in low-pass filter processing of actual data.展开更多
This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimizati...This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimization, operand isolation, clock gating and memory partitioning are adopted in the processor design to reduce the power consumption. Experimental results show that the complexity of the Continuous Interleaved Sampling (CIS) algorithm is reduced by more than 80 % and the power dissipation of the hardware alone is reduced by about 25% with the low power methods. The THUCIDSP-1 prototype, fabricated in 0.18-μm standard CMOS process, consumes only 1.91 mW when executing the CIS algorithm at 3 MHz.展开更多
The processing speed of the communication between nodes in a parallel processor has become the major bottleneck of the processor's performance.RDMA(Remote Direct Memory Access) technology has drawn more attention ...The processing speed of the communication between nodes in a parallel processor has become the major bottleneck of the processor's performance.RDMA(Remote Direct Memory Access) technology has drawn more attention recently due to its capability of transferring a larger amount of data, higher speed and reliability.4DSP(4 Digital Signal Processing) module comprised of Tiger-SHARC201 chip is connected by LVDS(Low Voltage Differential Signal) circuits.This paper proposes a general and reconfigurable RDMA platform and its corresponding communication protocol with all the routes linked based on the zero copy.The protocol transfers message of DSP by interrupting of DMA and is applied on massive remote image impression, which reduces memory needs and working burden of CPU.The experiment results show this platform is efficient, flexible, and expandable of being integrated to a larger scale in the next development stages.展开更多
基金the National Natural Science Foundation of China(No.60475018)~~
文摘This paper proposes a cochlear prosthetic system with an implanted digital signal processor (DSP). This system transmits voice-band signals with a low data rate through the wireless link, free of the data-rate limitation and suitable for future development. By optimizing the speech processing algorithm and the DSP hardware design, the implanted DSP manages to execute the continuous interleaved sampling (CIS) algorithm at a clock frequency of 3MHz and a power consumption of only 1.91mW. With an analytic power-transmission efficiency of the wireless inductive link (40%), the power overhead caused by the implanted DSP is derived as 2.87roW,which is trivial when compared with the power consumption of existing cochlear prosthetic systems (tens of milliwatts). With the DSP implanted,this new system can.be easily developed into a fully implanted cochlear prosthesis.
文摘Wave equation wave field numerical modeling technology is applied to the observation that deep layer imaging is difficult below a screening layer of high-velocity basalt. Three simple high-velocity basalt models are designed on the basis of basalt formation characteristics. The analysis of deep-layer reflection seismic signal energy shows that lowfrequency seismic signals are capable of both penetrating the thin high-velocity basalt layer and reducing the diffraction noise caused by the rough surfaces. The simulation experiment of a complete 2D basalt model confirms that the low-frequency signals can be used to boost the quality of deep-layer imaging under the high-velocity basalt layer and achieve good results in low-pass filter processing of actual data.
基金Supported by the National Natural Science Foundation of China (No. 60475018)
文摘This paper presents the design and implementation of a low power digital signal processor (THUCIDSP-1 ) targeting at application for cochlear implants. Multi-level low power strategies including algorithm optimization, operand isolation, clock gating and memory partitioning are adopted in the processor design to reduce the power consumption. Experimental results show that the complexity of the Continuous Interleaved Sampling (CIS) algorithm is reduced by more than 80 % and the power dissipation of the hardware alone is reduced by about 25% with the low power methods. The THUCIDSP-1 prototype, fabricated in 0.18-μm standard CMOS process, consumes only 1.91 mW when executing the CIS algorithm at 3 MHz.
基金Supported by the NSFC (National Natural Science Foundation of China)the 863 Program (2006AA1332)ERIPKU, the Program for New Century Excellent Talents in University.
文摘The processing speed of the communication between nodes in a parallel processor has become the major bottleneck of the processor's performance.RDMA(Remote Direct Memory Access) technology has drawn more attention recently due to its capability of transferring a larger amount of data, higher speed and reliability.4DSP(4 Digital Signal Processing) module comprised of Tiger-SHARC201 chip is connected by LVDS(Low Voltage Differential Signal) circuits.This paper proposes a general and reconfigurable RDMA platform and its corresponding communication protocol with all the routes linked based on the zero copy.The protocol transfers message of DSP by interrupting of DMA and is applied on massive remote image impression, which reduces memory needs and working burden of CPU.The experiment results show this platform is efficient, flexible, and expandable of being integrated to a larger scale in the next development stages.