The development of a high performance wideband radio frequency （RF） transceiver used in the next generation mobile communication system is presented. The developed RF transceiver operates in the 6 to 6.3 GHz band an...The development of a high performance wideband radio frequency （RF） transceiver used in the next generation mobile communication system is presented. The developed RF transceiver operates in the 6 to 6.3 GHz band and the channel bandwidth is up to 100 MHz. It operates in the time division duplex （TDD） mode and supports the multiple-input multipleoutput （MIMO） technique for the international mobile telecommunications （IMT）-advanced systems. The classical superheterodyne scheme is employed to achieve optimal performance. Design issues of the essential components such as low noise amplifier, power amplifier and local oscillators are described in detail. Measurement results show that the maximum linear output power of the RF transceiver is above 23 dBm, and the gain and noise figure of the low noise amplifier is around 24 dB and below 1 dB, respectively. Furthermore, the error vector magnitude （EVM） measurement shows that the performance of the developed RF transceiver is well beyond the requirements of the long term evolution （LTE）-advanced system. With up to 8 x 8 MIMO configuration, the RF transceiver supports more than a 1 Gbit/s data rate in field tests.展开更多
According to the theories of optimal noise match and optimal power match, a method for calculating the optimal source impedance of low noise amplifier （LNA） is proposed based on the input reflection coefficient S11....According to the theories of optimal noise match and optimal power match, a method for calculating the optimal source impedance of low noise amplifier （LNA） is proposed based on the input reflection coefficient S11. Moreover.with the help of Smith chart, the calculation process is detailed, and the trade-off between the lowest noise figure and the maximum power gain is obtained during the design of LNA input impedance matching network. Based on the Chart 0. 35-μm CMOS process, a traditional cascode LNA circuit is designed and manufactured. Simulation and experimental results have a good agreement with the theoretical analysis, thus proving the correctness of theoretical analysis and the feasibility of the method.展开更多
A CMOS dual-band low noise amplifer (LNA) design is presented.The purpose of th is work is intended to substitute only one LNA for two individual LNA's in dual -band transceivers for applications such as wireless ...A CMOS dual-band low noise amplifer (LNA) design is presented.The purpose of th is work is intended to substitute only one LNA for two individual LNA's in dual -band transceivers for applications such as wireless local area network complying with both IEEE 802.11a and 802.11b/g.Dua l-band simultaneous input power and noise matching and load shaping are discuss ed.The chip is implemented in 0.25μm CMOS mixed and RF process.The measured pe rformance is summarized and discussed.展开更多
基金The National Natural Science Foundation of China (No.60702027,60921063)the National Basic Research Program of China(973 Program)(No.2010CB327400)the National Science and Technology Major Project of Ministry of Science and Technology of China(No.2010ZX03007-001-01,2011ZX03004-001)
文摘The development of a high performance wideband radio frequency （RF） transceiver used in the next generation mobile communication system is presented. The developed RF transceiver operates in the 6 to 6.3 GHz band and the channel bandwidth is up to 100 MHz. It operates in the time division duplex （TDD） mode and supports the multiple-input multipleoutput （MIMO） technique for the international mobile telecommunications （IMT）-advanced systems. The classical superheterodyne scheme is employed to achieve optimal performance. Design issues of the essential components such as low noise amplifier, power amplifier and local oscillators are described in detail. Measurement results show that the maximum linear output power of the RF transceiver is above 23 dBm, and the gain and noise figure of the low noise amplifier is around 24 dB and below 1 dB, respectively. Furthermore, the error vector magnitude （EVM） measurement shows that the performance of the developed RF transceiver is well beyond the requirements of the long term evolution （LTE）-advanced system. With up to 8 x 8 MIMO configuration, the RF transceiver supports more than a 1 Gbit/s data rate in field tests.
基金Supported by the Nature Science Foundation for Key Program of Jiangsu Higher Education Institu-tions of China(09KJA510001)the Creative Talents Foundation of Nantong Universitythe Scientific ResearchFoundation of Nantong University(08B24,09ZW005)~~
文摘According to the theories of optimal noise match and optimal power match, a method for calculating the optimal source impedance of low noise amplifier （LNA） is proposed based on the input reflection coefficient S11. Moreover.with the help of Smith chart, the calculation process is detailed, and the trade-off between the lowest noise figure and the maximum power gain is obtained during the design of LNA input impedance matching network. Based on the Chart 0. 35-μm CMOS process, a traditional cascode LNA circuit is designed and manufactured. Simulation and experimental results have a good agreement with the theoretical analysis, thus proving the correctness of theoretical analysis and the feasibility of the method.
文摘A CMOS dual-band low noise amplifer (LNA) design is presented.The purpose of th is work is intended to substitute only one LNA for two individual LNA's in dual -band transceivers for applications such as wireless local area network complying with both IEEE 802.11a and 802.11b/g.Dua l-band simultaneous input power and noise matching and load shaping are discuss ed.The chip is implemented in 0.25μm CMOS mixed and RF process.The measured pe rformance is summarized and discussed.
