A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correl...A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissi...展开更多
基金Supported by National Natural Science Foundation of China (No.60806010,No.60976030)Tianjin Innovation Special Funds for Science and Technology (No.05FZZDGX00200)
文摘A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissi...
