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基于DSP的低速率视频传输系统的设计 被引量:3
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作者 薛金柱 张培强 沈兰荪 《测控技术》 CSCD 2002年第5期9-11,共3页
DSP高性能、可编程、低功耗等的特性使其非常适合视频处理 ,但其结构复杂 ,编程难度大 。
关键词 DSP 速率视频传输系统 设计 视频编码 H.263
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铁路通信中低速率数据传输设计浅析
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作者 姜连青 《铁路通信信号设计》 2001年第1期20-20,共1页
目前,铁路通信网存在大量的低速率数据需要传输,如何以低成本实现低速率设备接入光纤接入网,笔者结合某工程设计,作了一些探讨。
关键词 铁路 通信网 速率数据传输 设计 入网 数据专线
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一类(极)低信息速率的卫星通信技术 被引量:1
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作者 施浒立 崔君霞 杜晓辉 《中国科技成果》 2010年第11期16-19,共4页
文章介绍了开发一类低信息速率和极低信息速率传输的卫星通信技术的背景,进一步阐述了研究的基础条件和难点、所采用的技术,最后介绍了该技术的应用前景。
关键词 卫星通信技术 (极)信息速率传输
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大气激光通信技术分析
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作者 刘勇 刘江伟 张兵 《电光系统》 2005年第2期39-41,共3页
通过对大气激光通信技术的分析,提出一种立足于现有技术的大气激光通信方案,并对方案的关键技术进行分析,论证可行性。
关键词 大气激光通信 距离 语音信号 低速率传输 通信网络
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LOW-POWER LVDS I/O INTERFACE FOR ABOVE 2GB/S-PER-PIN OPERATION 被引量:3
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作者 Wang Xihu Wu Longsheng Liu Youbao 《Journal of Electronics(China)》 2009年第4期525-531,共7页
Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementat... Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementation of LVDS Input/Output (I/O) interface circuits in a standard 0.18 μm CMOS technology using thick gate oxide devices (3.3 V), fully compatible with LVDS standard. In the proposed transmitter, a novel Common-Mode FeedBack (CMFB)circuit is utilized to keep the common-mode output voltage stable over Process, supply Voltage and Temperature (PVT) variations. Because there are no area greedy resistors in the CMFB circuitry, the disadvantage of large die area in existing transmitter structures is avoided. To obtain sufficient gain, the receiver consists of three am- plifying stages: a voltage amplifying stage, a transconductance amplifying stage, and a transimpedance amplifying stage. And to exclude inner nodes with high RC time constant, shunt-shunt negative feedback is introduced in the receiver. A novel active inductor shunt peaking structure is used in the receiver to fulfill the stringent requirements of high speed and wide Common-Mode Input Region (CMIR) without voltage gain, power dissipation and silicon area penalty. Simulation results show that data rates of 2 Gbps and 2.5 Gbps are achieved for the transmitter and receiver with power con- sumption of 13.2 mW and 8.3 mW respectively. 展开更多
关键词 Input/Output (I/O) Low Voltage Differential Signaling (LVDS) TRANSMITTER Receiver Active inductor shunt peaking
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Low Power Single-Chip RF Transceiver for Human Body Cormunication 被引量:2
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作者 Nie Zedong Guan Feng +1 位作者 Huang Jin Wang Lei 《China Communications》 SCIE CSCD 2012年第9期1-10,共10页
Human body communication is proposed as a promising body proximal comanunication tech- nology for body sensor networks. To achieve low power and slmll volume ill the sensor nodes, a Ra-dio Frequency (RF) application... Human body communication is proposed as a promising body proximal comanunication tech- nology for body sensor networks. To achieve low power and slmll volume ill the sensor nodes, a Ra-dio Frequency (RF) application-specific integrated circuit transceiver tbr Human Body Commnunication (HBC) is presented and the characteristics of HBC are investigated. A high data rate On-Off Keying (OOK)/Frequency-Shift Keying (FSK) modulation protocol and an OOK/FSK delrodulator circuit are introduced in this paper, with a data-rate-to-carrier-frequency ratio up to 70%. A low noise amplifier is proposed to handle the dynamic range problem and improve the sensitivity of the receiver path. In addi-tion, a low power autonmatic-gain-control system is realized using a novel architecture, thereby render-ing the peak detector circuit and loop filter unneces-sary. Finally, the complete chip is fabricated. Simula-tion results suggest receiver sensitivity to be-75 dBm. The transceiver shows an overall power con-smxption of 32 mW when data rate is 5 Mbps, de-livering a P1dB output power of - 30 dBm. 展开更多
关键词 application-specific integrated circuit TRANSCEIVER human body communication
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