为了提高双丝双脉冲熔化极气体保护焊(gas metal arc welding, GMAW)的焊缝成形质量,探究低频相位对熔滴过渡和焊缝成形的影响,在高频同步的前提下分别对低频同步和交替模式进行了试验.通过高速摄影拍摄了低频同步和交替模式的熔滴过渡...为了提高双丝双脉冲熔化极气体保护焊(gas metal arc welding, GMAW)的焊缝成形质量,探究低频相位对熔滴过渡和焊缝成形的影响,在高频同步的前提下分别对低频同步和交替模式进行了试验.通过高速摄影拍摄了低频同步和交替模式的熔滴过渡过程,再结合焊接过程中电流变化,分析了熔滴过渡对熔池的影响机制.结果表明,交替模式可以减少熔滴的碰撞融合,进而减少大体积熔滴对熔池的冲击,减少了飞溅.交替模式比同步模式的焊缝平整性更好,余高方差更小,鱼鳞纹规则,焊缝成形美观.展开更多
This paper describes a wideband low phase noise frequency synthesizer.It operates in the multi-band including digital radio mondiale DRM digital audio broadcasting DAB amplitude modulation AM and frequency modulation ...This paper describes a wideband low phase noise frequency synthesizer.It operates in the multi-band including digital radio mondiale DRM digital audio broadcasting DAB amplitude modulation AM and frequency modulation FM .In order to cover the signals of the overall frequencies a novel frequency planning and a new structure are proposed. A wide-band low-phase-noise low-power voltage-control oscillator VCO and a high speed wide band high frequency division ratio pulse swallow frequency divider with a low power consumption are presented.The monolithic DRM/DAB/AM/FM frequency synthesizer chip is also fabricated in a SMIC＇s 0.18-μm CMOS process.The die area is 1 425 μm ×795 μm including the test buffer and pads. The measured results show that the VCO operating frequency range is from 2.22 to 3.57 GHz the measured phase noise of the VCO is 120.22 dBc/Hz at 1 MHz offset the pulse swallow frequency divider operation frequency is from 0.9 to 3.4 GHz.The phase noise in the phase-locked loop PLL is-59.52 dBc/Hz at 10 kHz offset and fits for the demand of the DRM/DAB/AM/FM RF front-end. The proposed frequency synthesizer consumes 47 mW including test buffer under a 1.8 V supply.展开更多
To determine the feasibility and practicability of interrupt continuous wave (CW) approach proposed for real time simulating radar intermediate frequency(IF) video signal, theoretical analysis and computer simulation...To determine the feasibility and practicability of interrupt continuous wave (CW) approach proposed for real time simulating radar intermediate frequency(IF) video signal, theoretical analysis and computer simulation were used. Phases at two linked points between the end and beginning of adjoined frames are always consistent; the bias Doppler frequency for the time delay of A/D sampling start responds to that for target acceleration. No digital phase compensation is required at continuous points, and the interrupt CW approach has apparently practical values.展开更多
The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to...The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to obtain a wide band and a large tuning range,a parallel switched capacitor bank is added in the LC tank.The proposed VCO is implemented in SMIC 0.18-μm RF CMOS technology and the chip area is 750 μm×560 μm,including the test buffer circuit and the pads.Measured results show that the tuning range is 44.6%;i.e.,the frequency turning range is from 2.27 to 3.57 GHz.The measured phase noise is-122.22 dBc/Hz at a 1 MHz offset from the carrier.The maximum power consumption of the core part is 6.16 mW at a 1.8 V power supply.展开更多
文摘为了提高双丝双脉冲熔化极气体保护焊(gas metal arc welding, GMAW)的焊缝成形质量,探究低频相位对熔滴过渡和焊缝成形的影响,在高频同步的前提下分别对低频同步和交替模式进行了试验.通过高速摄影拍摄了低频同步和交替模式的熔滴过渡过程,再结合焊接过程中电流变化,分析了熔滴过渡对熔池的影响机制.结果表明,交替模式可以减少熔滴的碰撞融合,进而减少大体积熔滴对熔池的冲击,减少了飞溅.交替模式比同步模式的焊缝平整性更好,余高方差更小,鱼鳞纹规则,焊缝成形美观.
基金The Research Project of Science and Technology at the University of Inner Mongolia Autonomous Region(No.NJZY11016)the Innovation Fund of the Ministry of Science and Technology for Small and Medium Sized Enterprises of China(No.11C26213211234)
文摘This paper describes a wideband low phase noise frequency synthesizer.It operates in the multi-band including digital radio mondiale DRM digital audio broadcasting DAB amplitude modulation AM and frequency modulation FM .In order to cover the signals of the overall frequencies a novel frequency planning and a new structure are proposed. A wide-band low-phase-noise low-power voltage-control oscillator VCO and a high speed wide band high frequency division ratio pulse swallow frequency divider with a low power consumption are presented.The monolithic DRM/DAB/AM/FM frequency synthesizer chip is also fabricated in a SMIC＇s 0.18-μm CMOS process.The die area is 1 425 μm ×795 μm including the test buffer and pads. The measured results show that the VCO operating frequency range is from 2.22 to 3.57 GHz the measured phase noise of the VCO is 120.22 dBc/Hz at 1 MHz offset the pulse swallow frequency divider operation frequency is from 0.9 to 3.4 GHz.The phase noise in the phase-locked loop PLL is-59.52 dBc/Hz at 10 kHz offset and fits for the demand of the DRM/DAB/AM/FM RF front-end. The proposed frequency synthesizer consumes 47 mW including test buffer under a 1.8 V supply.
文摘To determine the feasibility and practicability of interrupt continuous wave (CW) approach proposed for real time simulating radar intermediate frequency(IF) video signal, theoretical analysis and computer simulation were used. Phases at two linked points between the end and beginning of adjoined frames are always consistent; the bias Doppler frequency for the time delay of A/D sampling start responds to that for target acceleration. No digital phase compensation is required at continuous points, and the interrupt CW approach has apparently practical values.
文摘The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to obtain a wide band and a large tuning range,a parallel switched capacitor bank is added in the LC tank.The proposed VCO is implemented in SMIC 0.18-μm RF CMOS technology and the chip area is 750 μm×560 μm,including the test buffer circuit and the pads.Measured results show that the tuning range is 44.6%;i.e.,the frequency turning range is from 2.27 to 3.57 GHz.The measured phase noise is-122.22 dBc/Hz at a 1 MHz offset from the carrier.The maximum power consumption of the core part is 6.16 mW at a 1.8 V power supply.
