A new method of synthesizing 1GHz based on a 0 5μm CMOS D LL is proposed,which can synthesize frequency with simple logic and amplifiers.T he designed frequency synthesizer consists of a DLL (Delay-Locked Loop) and...A new method of synthesizing 1GHz based on a 0 5μm CMOS D LL is proposed,which can synthesize frequency with simple logic and amplifiers.T he designed frequency synthesizer consists of a DLL (Delay-Locked Loop) and a b uilding block of synthesizing logic.The reference frequency input into this freq uency synthesizer is 25MHz and the synthesized frequency is 1GHz.展开更多
A Y-band frequency doubler is analyzed and designed with GaAs planar Schottky diode, which is flip-chip solded into a 50 μm thick quartz substrate. Diode embedding impedance is found by full- wave analysis with lumpe...A Y-band frequency doubler is analyzed and designed with GaAs planar Schottky diode, which is flip-chip solded into a 50 μm thick quartz substrate. Diode embedding impedance is found by full- wave analysis with lumped port to model the nonlinear junction for impedance matching without the need of diode equivalent circuit model. All the matching circuit is designed ＂on-chip＂ and the mul- tiplier is self-biasing. To the doubler, a conversion efficiency of 6.1% and output power of 5.4mW are measured at 214GHz with input power of 88mW, and the typical measured efficiency is 4.5% in 200 - 225 GHz.展开更多
文摘A new method of synthesizing 1GHz based on a 0 5μm CMOS D LL is proposed,which can synthesize frequency with simple logic and amplifiers.T he designed frequency synthesizer consists of a DLL (Delay-Locked Loop) and a b uilding block of synthesizing logic.The reference frequency input into this freq uency synthesizer is 25MHz and the synthesized frequency is 1GHz.
基金Supported by the 12th Five-year Defense Pre-research Fund of China(No.51308030509)
文摘A Y-band frequency doubler is analyzed and designed with GaAs planar Schottky diode, which is flip-chip solded into a 50 μm thick quartz substrate. Diode embedding impedance is found by full- wave analysis with lumped port to model the nonlinear junction for impedance matching without the need of diode equivalent circuit model. All the matching circuit is designed ＂on-chip＂ and the mul- tiplier is self-biasing. To the doubler, a conversion efficiency of 6.1% and output power of 5.4mW are measured at 214GHz with input power of 88mW, and the typical measured efficiency is 4.5% in 200 - 225 GHz.
