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The MMU Implementation of Unity-1 Microprocessor 被引量:2
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作者 宋传华 Cheng +2 位作者 Xu Zhu Dexin 《High Technology Letters》 EI CAS 2003年第4期27-32,共6页
Virtual memory management is always a very essential issue of the modern microprocessor design. A memory management unit (MMU) is designed to implement a virtual machine for user programs, and provides a management me... Virtual memory management is always a very essential issue of the modern microprocessor design. A memory management unit (MMU) is designed to implement a virtual machine for user programs, and provides a management mechanism between the operating system and user programs. This paper analyzes the tradeoffs considered in the MMU design of Unity 11 CPU of Peking University, and introduces in detail the solution of pure hardware table walking with two level page table organization. The implementation takes care of required operations and high performances needed by modern operating systems and low costs needed by embedded systems. This solution has been silicon proven, and successfully porting the Linux 2.4.17 kernel, the XWindow system, GNOME and most application software onto the Unity platform. 展开更多
关键词 Unity 1 MMU TLB table walking MICROPROCESSOR
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A Low Power Non-Volatile LR-WPAN Baseband Processor with Wake-Up Identification Receiver
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作者 YU Shuangming FENG Peng WU Nanjian 《China Communications》 SCIE CSCD 2016年第1期33-46,共14页
The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power... The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation. 展开更多
关键词 LR-WPAN wake-up identification receiver synchronization non-volatile memory baseband processor digital integrated circuit low power chip design
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Design of 1 kbit antifuse one time programmable memory IP using dual program voltage
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作者 金丽妍 JANG Ji-Hye +1 位作者 KIM Du-Hwi KIM Young-Hee 《Journal of Central South University》 SCIE EI CAS 2011年第1期125-132,共8页
A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single po... A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single positive program voltage(VPP) has a problem when applying a higher voltage than the breakdown voltage of the thin gate oxides and at the same time,securing the reliability of medium voltage(VM) devices that are thick gate transistors.A new antifuse OTP cell using a dual program voltage was proposed to prevent the possibility for failures in a qualification test or the yield drop.For the newly proposed cell,a stable sensing is secured from the post-program resistances of several ten thousand ohms or below due to the voltage higher than the hard breakdown voltage applied to the terminals of the antifuse.The layout size of the designed 1 kbit antifuse OTP memory IP with Dongbu HiTek's 0.18 μm Bipolar-CMOS-DMOS(BCD) process is 567.9 μm×205.135 μm and the post-program resistance of an antifuse is predicted to be several ten thousand ohms. 展开更多
关键词 one time programmable memory IP ANTIFUSE hard breakdown dual program voltage post-program resistance
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关于广播电视监测机房环境监控系统的分析
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作者 柳玉海 《数码设计(电子版)》 2024年第1期0679-0681,共3页
广播电视监控是广电事业发展的重要工作环节,监测机房环境时,需要借助全方位的监控系统做支持。通过有效的机房环境监控,能够及时发现环境的安全隐患,提升相关工作人员的工作效率。通过本文分析可知,广播电视监测机房环境监控系统功能... 广播电视监控是广电事业发展的重要工作环节,监测机房环境时,需要借助全方位的监控系统做支持。通过有效的机房环境监控,能够及时发现环境的安全隐患,提升相关工作人员的工作效率。通过本文分析可知,广播电视监测机房环境监控系统功能要点包括数据采集功能、风险预警功能、数据传输功能、数据同步功能。在广播电视监测机房环境监控系统设计时,应当保证集中监管、合理应用储存管理器、充分发挥中心机房数据采集分析作用、实现监测数据可视化显示。只有把握广播电视监测机房环境监控系统的功能要点,并且提出有效的环境监控系统运行应用策略,才能够提升广播电视监测机房环境监控的质量,及时发现安全隐患,稳定发挥机房功能。 展开更多
关键词 广播电视监测机房 环境监控 风险预警 储存管理器
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