Based on the equivalent circuit model of a two-port optical receiver front-end,the relationship between the equivalent input noise current spectral density and the noise figure is analyzed. The derived relationship ha...Based on the equivalent circuit model of a two-port optical receiver front-end,the relationship between the equivalent input noise current spectral density and the noise figure is analyzed. The derived relationship has universal validity for determining the equivalent input noise current spectral density for optical receiver designs, as verified by measuring a 155Mb/s high-impedance optical receiver front.end. Good agreement between calculated and simulated results has been achieved.展开更多
A sensitivity design method for a CMOS optoelectronic integrated circuit （OEIC） receiver is reported. The receiver consists of a regulated cascade （RGC） transimpedance amplifier （TIA） and a double photodiode （...A sensitivity design method for a CMOS optoelectronic integrated circuit （OEIC） receiver is reported. The receiver consists of a regulated cascade （RGC） transimpedance amplifier （TIA） and a double photodiode （DPD） detector. The noise and sensitivity of the receiver are analyzed in detail. The noise mainly comes from the thermal noise of resistors and the flicker noise of MOSFETs. The relationship between noise and receiver sensitivity is presented. The sensitivity design method for the receiver is given by a set of equations. The OEIC receiver was implemented in a CSMC 0.6μm standard CMOS process. The measured eye diagram shows that the CMOS OEIC receiver is able to work at bit rates of up to 1.25GB/s and the sensitivity is - 12dBm.展开更多
This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large...This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^＋ guard.ring （PGR）, an n^＋ guard-ring （NGR）,and a deep-n-well （DNW） for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR ＋ NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.展开更多
Laser phase noise （LPN） plays an important role in optical coherent systems. Based on the algorithm of Viterbi-Viterbi cartier phase estimation （CPE）, the effects of LPN imposed on the coherent receivers are inves...Laser phase noise （LPN） plays an important role in optical coherent systems. Based on the algorithm of Viterbi-Viterbi cartier phase estimation （CPE）, the effects of LPN imposed on the coherent receivers are investigated for quadrature phase shift keying （QPSK）, 8 phase shift keying （SPSK） and 16-quadrature amplitude modulation （16-QAM） optical coherent systems, respectively. The simulation results show that the optimal block length in the phase estimation algorithm is a tradeoffbetween LPN and additive white Gaussian noise （AWGN）, and depends on the level of modulation formats. The resolution requirements of analog to digital converter （ADC） in the coherent receivers are independent of LPN or the level of modulation formats. For the bit error rate （BER） of 10-3, the required bit number of ADC is 6, and the gain is marginal for the higher resolution.展开更多
文摘Based on the equivalent circuit model of a two-port optical receiver front-end,the relationship between the equivalent input noise current spectral density and the noise figure is analyzed. The derived relationship has universal validity for determining the equivalent input noise current spectral density for optical receiver designs, as verified by measuring a 155Mb/s high-impedance optical receiver front.end. Good agreement between calculated and simulated results has been achieved.
文摘A sensitivity design method for a CMOS optoelectronic integrated circuit （OEIC） receiver is reported. The receiver consists of a regulated cascade （RGC） transimpedance amplifier （TIA） and a double photodiode （DPD） detector. The noise and sensitivity of the receiver are analyzed in detail. The noise mainly comes from the thermal noise of resistors and the flicker noise of MOSFETs. The relationship between noise and receiver sensitivity is presented. The sensitivity design method for the receiver is given by a set of equations. The OEIC receiver was implemented in a CSMC 0.6μm standard CMOS process. The measured eye diagram shows that the CMOS OEIC receiver is able to work at bit rates of up to 1.25GB/s and the sensitivity is - 12dBm.
文摘This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^＋ guard.ring （PGR）, an n^＋ guard-ring （NGR）,and a deep-n-well （DNW） for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR ＋ NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.
基金supported by the Scientific Research Program Funded by Shaanxi Provincial Education Department (No.11JK1006)
文摘Laser phase noise （LPN） plays an important role in optical coherent systems. Based on the algorithm of Viterbi-Viterbi cartier phase estimation （CPE）, the effects of LPN imposed on the coherent receivers are investigated for quadrature phase shift keying （QPSK）, 8 phase shift keying （SPSK） and 16-quadrature amplitude modulation （16-QAM） optical coherent systems, respectively. The simulation results show that the optimal block length in the phase estimation algorithm is a tradeoffbetween LPN and additive white Gaussian noise （AWGN）, and depends on the level of modulation formats. The resolution requirements of analog to digital converter （ADC） in the coherent receivers are independent of LPN or the level of modulation formats. For the bit error rate （BER） of 10-3, the required bit number of ADC is 6, and the gain is marginal for the higher resolution.
