A novel SPIC(smart power IC) with a simple APFC(active power factor correction) circuit on one chip is proposed.The V _ bus (bus voltage) with high power factor falls from 600V to 400V by using a delay circuit in w...A novel SPIC(smart power IC) with a simple APFC(active power factor correction) circuit on one chip is proposed.The V _ bus (bus voltage) with high power factor falls from 600V to 400V by using a delay circuit in which a long channel length NMOS is used to substitute a large biasing resistance to save chip area.The lower V _ bus results in a smaller R _ on (on-resistance) of power switcher,which reduces the power loss of the power devices,improves the efficiency of the circuit,and reduces the cost of circuits.An integrated high voltage over voltage protect circuit is also designed in the circuits.Theory and simulations both prove the correctness and availability of the design.展开更多
A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced...A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.展开更多
The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error ...The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error of less than ±1.0℃ over a temperature range from -50℃ to +125℃. In addition to all the features that conventional IC temperature sensors have, the new device also has very low static power dissipation ( 0.5 mW ) , low output impedance ( less than 1Ω), excellent stability, high reproducibility, and high precision. The sensor's circuit design and layout are discussed in detail. Applications of the sensor include almost any type of temperature sensing over the range of -50℃-+125℃. The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy. Due to the excellent performance and low cost of this sensor, more applications of the sensor over wide temperature range are expected.展开更多
A new LDMOST structure, named B-LDMOST that has a buried layer under the drain is proposed. The buried layer is not connected to the drift region, so it can optimize the vertical field distribution and increase breakd...A new LDMOST structure, named B-LDMOST that has a buried layer under the drain is proposed. The buried layer is not connected to the drift region, so it can optimize the vertical field distribution and increase breakdown voltage. The analysis and the simulated results show that B-LDMOST can increase breakdown voltage, with almost negligible influence on the other parameters such as on-resistance, switching time, and so on.展开更多
A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single po...A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single positive program voltage(VPP) has a problem when applying a higher voltage than the breakdown voltage of the thin gate oxides and at the same time,securing the reliability of medium voltage(VM) devices that are thick gate transistors.A new antifuse OTP cell using a dual program voltage was proposed to prevent the possibility for failures in a qualification test or the yield drop.For the newly proposed cell,a stable sensing is secured from the post-program resistances of several ten thousand ohms or below due to the voltage higher than the hard breakdown voltage applied to the terminals of the antifuse.The layout size of the designed 1 kbit antifuse OTP memory IP with Dongbu HiTek's 0.18 μm Bipolar-CMOS-DMOS(BCD) process is 567.9 μm×205.135 μm and the post-program resistance of an antifuse is predicted to be several ten thousand ohms.展开更多
A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock reco...A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock recovery method based on filter,and implements monolithic clock-recovery IC.The designed circuits include phase detector,voltage-controlled oscillator and loop filter.Among them,the voltage-control oscillator is a modified two-stage ring oscillator,which provides quadrature clock signals and presents wide voltage-controlled range and high voltage-controlling sensitivity.展开更多
A novel level-shift LDMOS （lateral double-diffused metal oxide semiconductor） structure with the HV （high voltage） -interconnection for a 600 V-HVIC （high voltage integrated circuit） on thick SOI （silicon on in...A novel level-shift LDMOS （lateral double-diffused metal oxide semiconductor） structure with the HV （high voltage） -interconnection for a 600 V-HVIC （high voltage integrated circuit） on thick SOI （silicon on insulator） is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600 V. From the proposed structure, the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600 V and high hot carrier instability, and the isolation performance over 1,200 V can be obtained successfully. This paper will show numerical and experimental results in detail.展开更多
文摘A novel SPIC(smart power IC) with a simple APFC(active power factor correction) circuit on one chip is proposed.The V _ bus (bus voltage) with high power factor falls from 600V to 400V by using a delay circuit in which a long channel length NMOS is used to substitute a large biasing resistance to save chip area.The lower V _ bus results in a smaller R _ on (on-resistance) of power switcher,which reduces the power loss of the power devices,improves the efficiency of the circuit,and reduces the cost of circuits.An integrated high voltage over voltage protect circuit is also designed in the circuits.Theory and simulations both prove the correctness and availability of the design.
文摘A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.
文摘The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error of less than ±1.0℃ over a temperature range from -50℃ to +125℃. In addition to all the features that conventional IC temperature sensors have, the new device also has very low static power dissipation ( 0.5 mW ) , low output impedance ( less than 1Ω), excellent stability, high reproducibility, and high precision. The sensor's circuit design and layout are discussed in detail. Applications of the sensor include almost any type of temperature sensing over the range of -50℃-+125℃. The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy. Due to the excellent performance and low cost of this sensor, more applications of the sensor over wide temperature range are expected.
基金Supported by the National Natural Science Foundation of China(No.69776041)
文摘A new LDMOST structure, named B-LDMOST that has a buried layer under the drain is proposed. The buried layer is not connected to the drift region, so it can optimize the vertical field distribution and increase breakdown voltage. The analysis and the simulated results show that B-LDMOST can increase breakdown voltage, with almost negligible influence on the other parameters such as on-resistance, switching time, and so on.
基金Work supported by the Second Stage of Brain Korea 21 Projectssupported by Changwon National University in 2009-2010
文摘A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single positive program voltage(VPP) has a problem when applying a higher voltage than the breakdown voltage of the thin gate oxides and at the same time,securing the reliability of medium voltage(VM) devices that are thick gate transistors.A new antifuse OTP cell using a dual program voltage was proposed to prevent the possibility for failures in a qualification test or the yield drop.For the newly proposed cell,a stable sensing is secured from the post-program resistances of several ten thousand ohms or below due to the voltage higher than the hard breakdown voltage applied to the terminals of the antifuse.The layout size of the designed 1 kbit antifuse OTP memory IP with Dongbu HiTek's 0.18 μm Bipolar-CMOS-DMOS(BCD) process is 567.9 μm×205.135 μm and the post-program resistance of an antifuse is predicted to be several ten thousand ohms.
文摘A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock recovery method based on filter,and implements monolithic clock-recovery IC.The designed circuits include phase detector,voltage-controlled oscillator and loop filter.Among them,the voltage-control oscillator is a modified two-stage ring oscillator,which provides quadrature clock signals and presents wide voltage-controlled range and high voltage-controlling sensitivity.
文摘A novel level-shift LDMOS （lateral double-diffused metal oxide semiconductor） structure with the HV （high voltage） -interconnection for a 600 V-HVIC （high voltage integrated circuit） on thick SOI （silicon on insulator） is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600 V. From the proposed structure, the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600 V and high hot carrier instability, and the isolation performance over 1,200 V can be obtained successfully. This paper will show numerical and experimental results in detail.
