Microchannel reactors are commonly used in micro-chemical technology. The performance of microreactors is greatly affected by the velocity field in the microchannel. The flow field is disturbed by the cylindrical etch...Microchannel reactors are commonly used in micro-chemical technology. The performance of microreactors is greatly affected by the velocity field in the microchannel. The flow field is disturbed by the cylindrical etch holes caused by air dust on the microchannel surface during its processing procedure. In this approach, a two-dimensional computational fluid dynamics （CFD） model is put forward to study the effect of etch holes on flow field. The influenced area of single or two concave etch holes is studied for the case of laminar flow. The hole diameter, the Reynolds number and the distance between the center of holes are found to have influences on the flow field. Numerical results indicate that the effects of etch hole on the flow field should be evaluated and the way of choosing the economic class of cleanroom for microreactor manufacture is presented.展开更多
An experimental study of the dependence of SiO2 waveguide side wall roughness on the etch condi- tions and etch masks in CHF3/O2 based reactive ion etching plasma was reported. When working under standard low-pressure...An experimental study of the dependence of SiO2 waveguide side wall roughness on the etch condi- tions and etch masks in CHF3/O2 based reactive ion etching plasma was reported. When working under standard low-pressure （20mtorr） etching conditions, a novel etch roughening phenomenon has been observed in the plasma, that is, the roughness of the etched front surface increases with the amount of material etched, independent of etch rate, RF power, and gas composition. Besides, the etched underlying side wall will be tapered as the upper SU-8 resist pattern degradation transfers downward. A process using double-layered mask, consisting of SU-8 resist and thin Chromium film, was developed for improving the side wall smoothness. Based on the studies, SiO2/Si channel waveguides with the propagation loss less than 0. 07dB/cm were fabricated at last.展开更多
This paper presents the fabrication of squama-shape micro/nano multi-scale structures and the analysis of the interaction among different-scale structures during the fabrication processes. Well-designed microstructure...This paper presents the fabrication of squama-shape micro/nano multi-scale structures and the analysis of the interaction among different-scale structures during the fabrication processes. Well-designed microstructures made of inverted pyramids and V-shape grooves are fabricated by KOH wet etching. High-dense high-aspect-ratio (HAR) nanostructures are fabricated atop microstructures by an improved maskless deep reactive ion etching (DRIE) process, with an optimized recipe to form micro/nano dual-scale structures (MNDS). Due to the impact of the profile of microstructures on the shape of nanostructures, dissymmetrical (i.e., squama-shape) nanopillars have been formed on the inclined surfaces of microstructures, while the symmetrical nanopillars are formed on the horizontal surfaces with different formation velocities. Furthermore, the optical properties of MNDS are not sensitive to structural parameters of microstructures, making the sample overcome the lithography limitation of conventional processes for photo-devices. Eventually, three-level structures are fabricated by sputtering a gold thin film on the MNDS, and the profile of MNDS is selective in the deposition of gold particles, which is very useful for practical applications.展开更多
A single-mask dry-release process for fabrication of high aspect ratio SOI MEMS devices is presented,which takes advantage of the lag effect in silicon DRIE(deep reactive ion etching).The wide trenches and the releasi...A single-mask dry-release process for fabrication of high aspect ratio SOI MEMS devices is presented,which takes advantage of the lag effect in silicon DRIE(deep reactive ion etching).The wide trenches and the releasing holes are etched to the buried oxide in the first-step DRIE whereas the narrow trenches are still connected due to the lag effect.After the buried oxide is removed by wet etching through the opened releasing holes and wide trenches,the narrow trenches are etched through by the second-step DRIE.Not only can the sticking problems be avoided,but also the footing effect during the DRIE can be partially suppressed.The feasibility of the proposed technique was verified by implementing a capacitive accelerometer.The scale factor and the non-linearity of the fabricated accelerometer were measured to be 63.4 mV/g and 0.1% with the measurement range of ±1 g,respectively.展开更多
基金Supported by the National Natural Science Foundation of China （20676093）.
文摘Microchannel reactors are commonly used in micro-chemical technology. The performance of microreactors is greatly affected by the velocity field in the microchannel. The flow field is disturbed by the cylindrical etch holes caused by air dust on the microchannel surface during its processing procedure. In this approach, a two-dimensional computational fluid dynamics （CFD） model is put forward to study the effect of etch holes on flow field. The influenced area of single or two concave etch holes is studied for the case of laminar flow. The hole diameter, the Reynolds number and the distance between the center of holes are found to have influences on the flow field. Numerical results indicate that the effects of etch hole on the flow field should be evaluated and the way of choosing the economic class of cleanroom for microreactor manufacture is presented.
文摘An experimental study of the dependence of SiO2 waveguide side wall roughness on the etch condi- tions and etch masks in CHF3/O2 based reactive ion etching plasma was reported. When working under standard low-pressure （20mtorr） etching conditions, a novel etch roughening phenomenon has been observed in the plasma, that is, the roughness of the etched front surface increases with the amount of material etched, independent of etch rate, RF power, and gas composition. Besides, the etched underlying side wall will be tapered as the upper SU-8 resist pattern degradation transfers downward. A process using double-layered mask, consisting of SU-8 resist and thin Chromium film, was developed for improving the side wall smoothness. Based on the studies, SiO2/Si channel waveguides with the propagation loss less than 0. 07dB/cm were fabricated at last.
基金supported by the National Natural Science Foundation of China (Grand Nos. 91023045, 61176103)the Key Laboratory Fund(Grant No. 9140C790103110C7903)
文摘This paper presents the fabrication of squama-shape micro/nano multi-scale structures and the analysis of the interaction among different-scale structures during the fabrication processes. Well-designed microstructures made of inverted pyramids and V-shape grooves are fabricated by KOH wet etching. High-dense high-aspect-ratio (HAR) nanostructures are fabricated atop microstructures by an improved maskless deep reactive ion etching (DRIE) process, with an optimized recipe to form micro/nano dual-scale structures (MNDS). Due to the impact of the profile of microstructures on the shape of nanostructures, dissymmetrical (i.e., squama-shape) nanopillars have been formed on the inclined surfaces of microstructures, while the symmetrical nanopillars are formed on the horizontal surfaces with different formation velocities. Furthermore, the optical properties of MNDS are not sensitive to structural parameters of microstructures, making the sample overcome the lithography limitation of conventional processes for photo-devices. Eventually, three-level structures are fabricated by sputtering a gold thin film on the MNDS, and the profile of MNDS is selective in the deposition of gold particles, which is very useful for practical applications.
基金supported by the National Natural Science Foundation of China (Grant No. 90923037)
文摘A single-mask dry-release process for fabrication of high aspect ratio SOI MEMS devices is presented,which takes advantage of the lag effect in silicon DRIE(deep reactive ion etching).The wide trenches and the releasing holes are etched to the buried oxide in the first-step DRIE whereas the narrow trenches are still connected due to the lag effect.After the buried oxide is removed by wet etching through the opened releasing holes and wide trenches,the narrow trenches are etched through by the second-step DRIE.Not only can the sticking problems be avoided,but also the footing effect during the DRIE can be partially suppressed.The feasibility of the proposed technique was verified by implementing a capacitive accelerometer.The scale factor and the non-linearity of the fabricated accelerometer were measured to be 63.4 mV/g and 0.1% with the measurement range of ±1 g,respectively.
