The charge storage characteristics of P-channel Ge/Si hetero-nanocrystal based MOSFET memory has been investigated and a logical array has been constructed using this memory cell. In the case of the thickness of tunne...The charge storage characteristics of P-channel Ge/Si hetero-nanocrystal based MOSFET memory has been investigated and a logical array has been constructed using this memory cell. In the case of the thickness of tunneling oxide Tox = 2 nm and the dimensions of Si- and Ge-nanocrystal Dsi = DGe = 5 nm, the retention time of this device can reach ten years(～1 × 108 s) while the programming and erasing time achieve the orders of microsecond and millisecond at the control gate voltage | Vg | = 3 V with respect to N-wells,respectively. Therefore, this novel device, as an excellent nonvolatile memory operating at room temperature,is desired to obtain application in future VLSI.展开更多
CMOS binary logic is limited by short channel effects, power density, and interconnection restrictions. The effective solution is non-silicon multiple-valued logic （MVL） computing. This study presents two high-perfo...CMOS binary logic is limited by short channel effects, power density, and interconnection restrictions. The effective solution is non-silicon multiple-valued logic （MVL） computing. This study presents two high-performance quaternary full adder cells based on carbon nanotube field effect transistors （CNTFETs）. The proposed designs use the unique properties of CNTFETs such as achieving a desired threshold voltage by adjusting the carbon nanotube diameters and having the same mobility as p-type and n-type devices. The proposed circuits were simulated under various test conditions using the Synopsys HSPICE simulator with the 32 nm Stanford comprehensive CNTFET model. The proposed designs have on average 32% lower delay, 68% average power, 83% energy consumption, and 77% static power compared to current state-of-the-art quaternary full adders. Simulation results indicated that the proposed designs are robust against process, voltage, and temperature variations, and are noise tolerant.展开更多
文摘The charge storage characteristics of P-channel Ge/Si hetero-nanocrystal based MOSFET memory has been investigated and a logical array has been constructed using this memory cell. In the case of the thickness of tunneling oxide Tox = 2 nm and the dimensions of Si- and Ge-nanocrystal Dsi = DGe = 5 nm, the retention time of this device can reach ten years(～1 × 108 s) while the programming and erasing time achieve the orders of microsecond and millisecond at the control gate voltage | Vg | = 3 V with respect to N-wells,respectively. Therefore, this novel device, as an excellent nonvolatile memory operating at room temperature,is desired to obtain application in future VLSI.
文摘CMOS binary logic is limited by short channel effects, power density, and interconnection restrictions. The effective solution is non-silicon multiple-valued logic （MVL） computing. This study presents two high-performance quaternary full adder cells based on carbon nanotube field effect transistors （CNTFETs）. The proposed designs use the unique properties of CNTFETs such as achieving a desired threshold voltage by adjusting the carbon nanotube diameters and having the same mobility as p-type and n-type devices. The proposed circuits were simulated under various test conditions using the Synopsys HSPICE simulator with the 32 nm Stanford comprehensive CNTFET model. The proposed designs have on average 32% lower delay, 68% average power, 83% energy consumption, and 77% static power compared to current state-of-the-art quaternary full adders. Simulation results indicated that the proposed designs are robust against process, voltage, and temperature variations, and are noise tolerant.
