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多线程应用程序中的同步控制技术及应用 被引量:5
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作者 于华 《计算机系统应用》 北大核心 2001年第7期47-48,52,共3页
设计多线程应用程序必须在线程之间保持一定的同 步关系;才能使用户能够对独立运行的线程进行有效的控制. 以保证线程的安全运行。这是多线程编程中最关键也是最复杂 的问题。本文将介绍多线程间的同步控制方法.并给出了在 Delp... 设计多线程应用程序必须在线程之间保持一定的同 步关系;才能使用户能够对独立运行的线程进行有效的控制. 以保证线程的安全运行。这是多线程编程中最关键也是最复杂 的问题。本文将介绍多线程间的同步控制方法.并给出了在 Delphi的应用实例。 展开更多
关键词 操作系统 多线时程 应用程序 同频控制 WINDOWS
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Slack-Decode Simultaneously and Redundantly Threaded Architecture 被引量:3
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作者 杨华 崔刚 +1 位作者 刘宏伟 杨孝宗 《Journal of Donghua University(English Edition)》 EI CAS 2005年第3期1-6,共6页
Slack-Decode Simultaneously and Redundantly Threaded (SD-SRT) is proposed for detecting transient faults in processors. SD-SRT boosts the previously proposed SRT performance via definitely eliminating redundant inst... Slack-Decode Simultaneously and Redundantly Threaded (SD-SRT) is proposed for detecting transient faults in processors. SD-SRT boosts the previously proposed SRT performance via definitely eliminating redundant instructiou fetches. First, the fetch stage is moved out of the Spheres of Replication (SoR), and a unified instruction-fetch-queue (IFQ) is exploited by both the leading and trailing threads. Second, a scheme called slack-decode cooperates with the unified IFQ to harmonize proceeding of the two threads. The simulations show that SD-SRT outperforms original SRT in terms of IPC by 15%, and decreases I-cache access by 42%. Meanwhile, SD-SRT leads to a lessened size and complexity for hardware structures such as load-value-queue and store-buffer. 展开更多
关键词 transient fault redundant multithreading ARCHITECTURE
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Dynamic Power Dissipation Control Method for Real-Time Processors Based on Hardware Multithreading
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作者 罗新强 齐悦 +1 位作者 王磊 王沁 《China Communications》 SCIE CSCD 2013年第5期156-166,共11页
In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware m... In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware multithread is discussed and a novel dynamic multithreaded architecture is proposed. The proposed architecture saves the energy wasted by removing idle threads without manipulation on the original architecture, fulfills a seamless switching mechanism which protects active threads and avoids pipeline stall during power mode switching. The report of an implemented dynamic multithreaded processor with 45 nm process from synthesis tool indicates that the area of dynamic multithreaded architecture is only 2.27% higher than the static one in achieving dynamic power dissipation, and consumes 1.3% more power in the same peak performance. 展开更多
关键词 dynamic power dissipation control real-time processor hardware multithread low power design energy efficiency
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