An improved multiplier-free feed-forward carrier phase estimation algorithm is proposed for dual-polarization quad-rature-phase-shift-keying (DP-QPSK) with coherent detection. The bit error rate (BER) performance, blo...An improved multiplier-free feed-forward carrier phase estimation algorithm is proposed for dual-polarization quad-rature-phase-shift-keying (DP-QPSK) with coherent detection. The bit error rate (BER) performance, block length effect and linewidth tolerance of the proposed algorithm are evaluated for a 112 Gbit/s DP-QPSK system. A linewidth symbol duration product of 2.9×10-4 is demonstrated for 1 dB optical signal-to-noise-ratio (OSNR) penalty at BER of 10-3 for the proposed algorithm. The hardware complexity of the proposed multiplier-free algorithm is demonstrated to be much lower than that of the 4th power algorithm.展开更多
The design and measured results of a broad-band direct quadrature phase shift keying(QPSK) modulator and demodulator are described in this paper.The circuits are fabricated using 1-m GaAs HBT technology.To suppress th...The design and measured results of a broad-band direct quadrature phase shift keying(QPSK) modulator and demodulator are described in this paper.The circuits are fabricated using 1-m GaAs HBT technology.To suppress the local oscillator(LO) leakage,the double-balanced mixer is selected as the core unit in the modulator/demodulator.An embedded four-way quadrature divider which includes a Lange coupler and two Baluns is utilized in the system to generate quadrature-phase LO signals.As results of a back-to-back test,the system can operate at data rates in excess of 2 Gb/s(1 Gb/s per I and Q channels) at 30 GHz.The supplies of the modulator and demodulator are 5.0 V and 4.5 V with size of 1.35 mm×3.5 mm and 1.36 mm×3.4 mm,respectively.展开更多
基金the National Natural Science Foundation of China (No.61275052)the National High-Tech Research and Development Program of China (No.2007AA01Z258)+2 种基金the Fundamental Research Funds for the Central Universities (No.2009YJS005)the Major State Basic Research Development Program of China (No.2010CB328206)the Beijing Nova Program (No.2008A026)
文摘An improved multiplier-free feed-forward carrier phase estimation algorithm is proposed for dual-polarization quad-rature-phase-shift-keying (DP-QPSK) with coherent detection. The bit error rate (BER) performance, block length effect and linewidth tolerance of the proposed algorithm are evaluated for a 112 Gbit/s DP-QPSK system. A linewidth symbol duration product of 2.9×10-4 is demonstrated for 1 dB optical signal-to-noise-ratio (OSNR) penalty at BER of 10-3 for the proposed algorithm. The hardware complexity of the proposed multiplier-free algorithm is demonstrated to be much lower than that of the 4th power algorithm.
基金supported by the National Basic Research Program of China (2010CB327505)
文摘The design and measured results of a broad-band direct quadrature phase shift keying(QPSK) modulator and demodulator are described in this paper.The circuits are fabricated using 1-m GaAs HBT technology.To suppress the local oscillator(LO) leakage,the double-balanced mixer is selected as the core unit in the modulator/demodulator.An embedded four-way quadrature divider which includes a Lange coupler and two Baluns is utilized in the system to generate quadrature-phase LO signals.As results of a back-to-back test,the system can operate at data rates in excess of 2 Gb/s(1 Gb/s per I and Q channels) at 30 GHz.The supplies of the modulator and demodulator are 5.0 V and 4.5 V with size of 1.35 mm×3.5 mm and 1.36 mm×3.4 mm,respectively.
