During the ultra large scale integration （ULSI） process, the surface roughness of the polished silicon wafer plays an important role in the quality and rate of production of devices. In this work, the effects of oxi...During the ultra large scale integration （ULSI） process, the surface roughness of the polished silicon wafer plays an important role in the quality and rate of production of devices. In this work, the effects of oxidizer, surfactant, polyurethane pad and slurry additives on the surface roughness and topography of chemical-mechanical planarization （CMP） for silicon have been investigated. A standard atomic force microscopy （AFM） test method for the atomic scale smooth surface was proposed and used to measure the polished silicon surfaces. Finally, compared with the theoretical calculated Ra value of 0.0276 rim, a near-perfect silicon surface with the surface roughness at an atomic scale （0.5 4） was achieved based on an optimized CMP process.展开更多
基金supported by the Science Fund for Creative Research Groups(Grant No.51021064)the National Natural Science Foundation of China(Grant No.51205226)
文摘During the ultra large scale integration （ULSI） process, the surface roughness of the polished silicon wafer plays an important role in the quality and rate of production of devices. In this work, the effects of oxidizer, surfactant, polyurethane pad and slurry additives on the surface roughness and topography of chemical-mechanical planarization （CMP） for silicon have been investigated. A standard atomic force microscopy （AFM） test method for the atomic scale smooth surface was proposed and used to measure the polished silicon surfaces. Finally, compared with the theoretical calculated Ra value of 0.0276 rim, a near-perfect silicon surface with the surface roughness at an atomic scale （0.5 4） was achieved based on an optimized CMP process.
