针对有噪声的高维数据引起决策树预测准确率下降的问题,利用容噪主成分分析(Noise-free Principal Component Anlysis,NFPCA)算法思想对C4.5算法改进而形成NFPCA-in-C4.5算法。该算法一方面将高维数据噪声控制问题转化为拟合数据特征与...针对有噪声的高维数据引起决策树预测准确率下降的问题,利用容噪主成分分析(Noise-free Principal Component Anlysis,NFPCA)算法思想对C4.5算法改进而形成NFPCA-in-C4.5算法。该算法一方面将高维数据噪声控制问题转化为拟合数据特征与控制平滑度相结合的最优化问题,从而获得主成分空间;另一方面在决策树自顶向下构建新节点的过程中,再将主成分空间恢复到原始数据空间来避免降维过程中属性特征信息永久消失。实验结果表明NFPCA-in-C4.5算法兼具降维和容噪功能,避免了降维中由特征信息损失和噪声残留造成的预测模型准确率大幅降低的问题。展开更多
Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45n...Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45nm BSIM4 SPICE models in HSPICE. The simulation results show that the proposed circuits effectively lower the active power, reduce the total leakage current, and enhance speed under similar noise immunity conditions. The active power of the two proposed circuits can be reduced by up to 8. 8% and 11.8% while enhancing the speed by 9.5% and 13.7% as compared to dual Vt domino OR gates with no gating stage. At the same time,the total leakage currents are also reduced by up to 80.8% and 82.4% ,respectively. Based on the simulation results,the state of the evaluation node is also discussed to reduce the total leakage currents of dual Vt dominos.展开更多
In this paper we propose a new discrete bidirectional associative memory (DBAM) which is derived from our previous continuous linear bidirectional associative memory (LBAM). The DBAM performs bidirectionally the opti...In this paper we propose a new discrete bidirectional associative memory (DBAM) which is derived from our previous continuous linear bidirectional associative memory (LBAM). The DBAM performs bidirectionally the optimal associative mapping proposed by Kohonen. Like LBAM and NBAM proposed by one of the present authors,the present BAM ensures the guaranteed recall of all stored patterns,and possesses far higher capacity compared with other existing BAMs,and like NBAM, has the strong ability to suppress the noise occurring in the output patterns and therefore reduce largely the spurious patterns. The derivation of DBAM is given and the stability of DBAM is proved. We also derive a learning algorithm for DBAM,which has iterative form and make the network learn new patterns easily. Compared with NBAM the present BAM can be easily implemented by software.展开更多
A 2 5GHz fully integrated LC VCO is fabricated in a standard single poly 4 metal 0 35μm digital CMOS process,using a complementary cross coupled topology for lowering power dissipation and reducing the effect of...A 2 5GHz fully integrated LC VCO is fabricated in a standard single poly 4 metal 0 35μm digital CMOS process,using a complementary cross coupled topology for lowering power dissipation and reducing the effect of 1/ f noise.An on chip LC filtering technique is used to lower the high frequency noise.Accumulation varactors are used to widen frequency tuning.The measured tuning range is 23 percent.A single hexadecagon symmetric on chip spiral is used with grounded shield pattern to reduce the chip area and maximize the quality factor.A phase noise of -118dBc/Hz at 1MHz offset is measured.The power dissipation is 4mA at V DD =3 3V.展开更多
The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to...The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to obtain a wide band and a large tuning range,a parallel switched capacitor bank is added in the LC tank.The proposed VCO is implemented in SMIC 0.18-μm RF CMOS technology and the chip area is 750 μm×560 μm,including the test buffer circuit and the pads.Measured results show that the tuning range is 44.6%;i.e.,the frequency turning range is from 2.27 to 3.57 GHz.The measured phase noise is-122.22 dBc/Hz at a 1 MHz offset from the carrier.The maximum power consumption of the core part is 6.16 mW at a 1.8 V power supply.展开更多
文摘针对有噪声的高维数据引起决策树预测准确率下降的问题,利用容噪主成分分析(Noise-free Principal Component Anlysis,NFPCA)算法思想对C4.5算法改进而形成NFPCA-in-C4.5算法。该算法一方面将高维数据噪声控制问题转化为拟合数据特征与控制平滑度相结合的最优化问题,从而获得主成分空间;另一方面在决策树自顶向下构建新节点的过程中,再将主成分空间恢复到原始数据空间来避免降维过程中属性特征信息永久消失。实验结果表明NFPCA-in-C4.5算法兼具降维和容噪功能,避免了降维中由特征信息损失和噪声残留造成的预测模型准确率大幅降低的问题。
文摘Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45nm BSIM4 SPICE models in HSPICE. The simulation results show that the proposed circuits effectively lower the active power, reduce the total leakage current, and enhance speed under similar noise immunity conditions. The active power of the two proposed circuits can be reduced by up to 8. 8% and 11.8% while enhancing the speed by 9.5% and 13.7% as compared to dual Vt domino OR gates with no gating stage. At the same time,the total leakage currents are also reduced by up to 80.8% and 82.4% ,respectively. Based on the simulation results,the state of the evaluation node is also discussed to reduce the total leakage currents of dual Vt dominos.
文摘In this paper we propose a new discrete bidirectional associative memory (DBAM) which is derived from our previous continuous linear bidirectional associative memory (LBAM). The DBAM performs bidirectionally the optimal associative mapping proposed by Kohonen. Like LBAM and NBAM proposed by one of the present authors,the present BAM ensures the guaranteed recall of all stored patterns,and possesses far higher capacity compared with other existing BAMs,and like NBAM, has the strong ability to suppress the noise occurring in the output patterns and therefore reduce largely the spurious patterns. The derivation of DBAM is given and the stability of DBAM is proved. We also derive a learning algorithm for DBAM,which has iterative form and make the network learn new patterns easily. Compared with NBAM the present BAM can be easily implemented by software.
文摘A 2 5GHz fully integrated LC VCO is fabricated in a standard single poly 4 metal 0 35μm digital CMOS process,using a complementary cross coupled topology for lowering power dissipation and reducing the effect of 1/ f noise.An on chip LC filtering technique is used to lower the high frequency noise.Accumulation varactors are used to widen frequency tuning.The measured tuning range is 23 percent.A single hexadecagon symmetric on chip spiral is used with grounded shield pattern to reduce the chip area and maximize the quality factor.A phase noise of -118dBc/Hz at 1MHz offset is measured.The power dissipation is 4mA at V DD =3 3V.
文摘The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to obtain a wide band and a large tuning range,a parallel switched capacitor bank is added in the LC tank.The proposed VCO is implemented in SMIC 0.18-μm RF CMOS technology and the chip area is 750 μm×560 μm,including the test buffer circuit and the pads.Measured results show that the tuning range is 44.6%;i.e.,the frequency turning range is from 2.27 to 3.57 GHz.The measured phase noise is-122.22 dBc/Hz at a 1 MHz offset from the carrier.The maximum power consumption of the core part is 6.16 mW at a 1.8 V power supply.
