Efficiency and power loss in the microelectronic devices is a major issue in power electronics applications. The engineers are challenged every year to increase power density and at the same time reduce the amount of ...Efficiency and power loss in the microelectronic devices is a major issue in power electronics applications. The engineers are challenged every year to increase power density and at the same time reduce the amount of power dissipated in the applications to keep the maximum temperatures under specifications. This situation drives a constant demand for better efficiencies in smaller packages. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs （metal oxide semiconductor field effect transistors） through lower RDS （ON） （resistance drain to source in the ON state） devices and lowering switching losses through low-frequency operation. However, the incremental improvements in RDS （ON） are at a point of diminishing returns and low RDS （ON） devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and increased power in smaller packages is being addressed by advancements in both silicon and packaging technologies. The NexFET power block combines these two technologies to achieve higher levels of performance, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.展开更多
文摘Efficiency and power loss in the microelectronic devices is a major issue in power electronics applications. The engineers are challenged every year to increase power density and at the same time reduce the amount of power dissipated in the applications to keep the maximum temperatures under specifications. This situation drives a constant demand for better efficiencies in smaller packages. Traditional approaches to improve efficiency in DC/DC synchronous buck converters include reducing conduction losses in the MOSFETs （metal oxide semiconductor field effect transistors） through lower RDS （ON） （resistance drain to source in the ON state） devices and lowering switching losses through low-frequency operation. However, the incremental improvements in RDS （ON） are at a point of diminishing returns and low RDS （ON） devices have large parasitic capacitances that do not facilitate the high-frequency operation required to improve power density. The drive for higher efficiency and increased power in smaller packages is being addressed by advancements in both silicon and packaging technologies. The NexFET power block combines these two technologies to achieve higher levels of performance, and in half the space versus discrete MOSFETs. This article explains these new technologies and highlights their performance advantage.
