研究了使用开关电源为射频系统供电时,射频系统对于电源纹波的容忍度。从电源纹波泄漏到基带信号、电源纹波与射频信号混频两方面研究了电源纹波对系统的影响,并根据协议规范,确定出电源纹波值。在IEEE 802.11g协议下,通过仿真得出电源...研究了使用开关电源为射频系统供电时,射频系统对于电源纹波的容忍度。从电源纹波泄漏到基带信号、电源纹波与射频信号混频两方面研究了电源纹波对系统的影响,并根据协议规范,确定出电源纹波值。在IEEE 802.11g协议下,通过仿真得出电源纹波应控制在15 m V以下。展开更多
The development of a high performance wideband radio frequency （RF） transceiver used in the next generation mobile communication system is presented. The developed RF transceiver operates in the 6 to 6.3 GHz band an...The development of a high performance wideband radio frequency （RF） transceiver used in the next generation mobile communication system is presented. The developed RF transceiver operates in the 6 to 6.3 GHz band and the channel bandwidth is up to 100 MHz. It operates in the time division duplex （TDD） mode and supports the multiple-input multipleoutput （MIMO） technique for the international mobile telecommunications （IMT）-advanced systems. The classical superheterodyne scheme is employed to achieve optimal performance. Design issues of the essential components such as low noise amplifier, power amplifier and local oscillators are described in detail. Measurement results show that the maximum linear output power of the RF transceiver is above 23 dBm, and the gain and noise figure of the low noise amplifier is around 24 dB and below 1 dB, respectively. Furthermore, the error vector magnitude （EVM） measurement shows that the performance of the developed RF transceiver is well beyond the requirements of the long term evolution （LTE）-advanced system. With up to 8 x 8 MIMO configuration, the RF transceiver supports more than a 1 Gbit/s data rate in field tests.展开更多
A 2. 4GHz CMOS monolithic transceiver front-end for IEEE 802. llb wireless LAN applications is presented. The receiver and transmitter are both of superheterodyne structure for good system performance. The frontend co...A 2. 4GHz CMOS monolithic transceiver front-end for IEEE 802. llb wireless LAN applications is presented. The receiver and transmitter are both of superheterodyne structure for good system performance. The frontend consists of five blocks., low noise amplifier,down-converter, up-converter, pre-amplifier, and LO buffer. Their input/output impedance are all on-chip matched to 50 Ω except the down-converter which has open-drain outputs. The transceiver RF front-end has been implemented in a 0. 18μm CMOS process. When the LNA and the down-converter are directly connected, the measured noise figure is 5.2dB, the measured available power gain 12. 5dB, the input l dB compression point --18dBm,and the third-order input intercept point --7dBm. The receiver front-end draws 13.6mA currents from the 1.8V power supply. When the up-converter and pre-amplifier are directly connected, the measured noise figure is 12.4dB, the power gain is 23. 8dB, the output ldB compression point is 1.5dBm, and the third-order output intercept point is 16dBm. The transmitter consumes 27.6mA current from the 1.8V power supply.展开更多
The 13.56 MHz analog front-end circuit for ISO/IEC 15693-compatible radio frequency identification (RFID) trans- ponder IC presented in this paper converts RF power to DC and extracts clock and data from the interroga...The 13.56 MHz analog front-end circuit for ISO/IEC 15693-compatible radio frequency identification (RFID) trans- ponder IC presented in this paper converts RF power to DC and extracts clock and data from the interrogator by 10% or 100% ASK modulation. The transponder sends data back to the interrogator by load modulation technology. The electrostatic discharge (ESD) protection circuits function to limit RF voltage to a safe level. An inductive coupling simulation modelling for 13.56 MHz RFID system is presented, with simulation results showing that the transponder operates over a wide range of electromagnetic field strength from Hmin (150 mA/m) to Hmax (5 A/m). The transponder IC is implemented in SMIC 0.35-μm three-metal two-poly mixed signal CMOS technology with embedded EEPROM.展开更多
基金The National Natural Science Foundation of China (No.60702027,60921063)the National Basic Research Program of China(973 Program)(No.2010CB327400)the National Science and Technology Major Project of Ministry of Science and Technology of China(No.2010ZX03007-001-01,2011ZX03004-001)
文摘The development of a high performance wideband radio frequency （RF） transceiver used in the next generation mobile communication system is presented. The developed RF transceiver operates in the 6 to 6.3 GHz band and the channel bandwidth is up to 100 MHz. It operates in the time division duplex （TDD） mode and supports the multiple-input multipleoutput （MIMO） technique for the international mobile telecommunications （IMT）-advanced systems. The classical superheterodyne scheme is employed to achieve optimal performance. Design issues of the essential components such as low noise amplifier, power amplifier and local oscillators are described in detail. Measurement results show that the maximum linear output power of the RF transceiver is above 23 dBm, and the gain and noise figure of the low noise amplifier is around 24 dB and below 1 dB, respectively. Furthermore, the error vector magnitude （EVM） measurement shows that the performance of the developed RF transceiver is well beyond the requirements of the long term evolution （LTE）-advanced system. With up to 8 x 8 MIMO configuration, the RF transceiver supports more than a 1 Gbit/s data rate in field tests.
文摘A 2. 4GHz CMOS monolithic transceiver front-end for IEEE 802. llb wireless LAN applications is presented. The receiver and transmitter are both of superheterodyne structure for good system performance. The frontend consists of five blocks., low noise amplifier,down-converter, up-converter, pre-amplifier, and LO buffer. Their input/output impedance are all on-chip matched to 50 Ω except the down-converter which has open-drain outputs. The transceiver RF front-end has been implemented in a 0. 18μm CMOS process. When the LNA and the down-converter are directly connected, the measured noise figure is 5.2dB, the measured available power gain 12. 5dB, the input l dB compression point --18dBm,and the third-order input intercept point --7dBm. The receiver front-end draws 13.6mA currents from the 1.8V power supply. When the up-converter and pre-amplifier are directly connected, the measured noise figure is 12.4dB, the power gain is 23. 8dB, the output ldB compression point is 1.5dBm, and the third-order output intercept point is 16dBm. The transmitter consumes 27.6mA current from the 1.8V power supply.
文摘The 13.56 MHz analog front-end circuit for ISO/IEC 15693-compatible radio frequency identification (RFID) trans- ponder IC presented in this paper converts RF power to DC and extracts clock and data from the interrogator by 10% or 100% ASK modulation. The transponder sends data back to the interrogator by load modulation technology. The electrostatic discharge (ESD) protection circuits function to limit RF voltage to a safe level. An inductive coupling simulation modelling for 13.56 MHz RFID system is presented, with simulation results showing that the transponder operates over a wide range of electromagnetic field strength from Hmin (150 mA/m) to Hmax (5 A/m). The transponder IC is implemented in SMIC 0.35-μm three-metal two-poly mixed signal CMOS technology with embedded EEPROM.
