A small-signal equivalent circuit model and the ted. The equivalent lumped circuit, which takes the main extraction techniques for photodetector chips are presen- factors that limit a photodetector＇s RF performance i...A small-signal equivalent circuit model and the ted. The equivalent lumped circuit, which takes the main extraction techniques for photodetector chips are presen- factors that limit a photodetector＇s RF performance into consideration,is first determined based on the device＇s physical structure. The photodetector＇s S parameters are then on-wafer measured, and the measured raw data are processed with further calibration. A genetic algorithm is used to fit the measured data, thereby allowing us to calculate each parameter value of the model. Experimental resuits show that the modeled parameters are well matched to the measurements in a frequency range from 130MHz to 20GHz, and the proposed method is proved feasible. This model can give an exact description of the photodetector chip＇s high frequency performance,which enables an effective circuit-level prediction for photodetector and optoelectronic integrated circuits.展开更多
This paper introduces a novel digital transceiver for the cordless telephone zero （CT0） standard,which uses a digital modulation and demodulation technique to handle the signal instead of the traditional analog meth...This paper introduces a novel digital transceiver for the cordless telephone zero （CT0） standard,which uses a digital modulation and demodulation technique to handle the signal instead of the traditional analog meth-od. In the transmitter,a fractional-N phase locked loop （PLL） is utilized to realize the continuous phase frequency shift key （CPFSK） modulation,and a 2 Ts raised cosine （2RC） shaping technique is used to reduce the occupied bandwidth. In the receiver,a novel digital method is proposed to demodulate the 2RC CPFSK signal. This chip is fabricated using an SMIC 0.35μm mixed signal CMOS process with a die size of 2mm × 2mm. With an external low noise amplifier （LNA）,the sensitivity of the chip is better than -103dBm.展开更多
A simple and effective mechanism is proposed to realize the parsimoniousness of the online least squares support vector regression （LS-SVR）, and the approach is called the OPLS-SVR for short. Hence, the response tim...A simple and effective mechanism is proposed to realize the parsimoniousness of the online least squares support vector regression （LS-SVR）, and the approach is called the OPLS-SVR for short. Hence, the response time is curtailed. Besides, an OPLS-SVR based analytical redundancy technique is presented to cope with the sensor failure and drift problems to guarantee that the provided signals for the aeroengine controller are correct and acceptable. Experiments on the sensor failure and drift show the effectiveness and the validity of the proposed analytical redundancy.展开更多
A new FM transmitter is reported. It adopts a fractional-N PLL synthesizer to realize the FM modulator. An extra offset current has also been applied to eliminate the effects of the mismatch in CP. The chip is fabrica...A new FM transmitter is reported. It adopts a fractional-N PLL synthesizer to realize the FM modulator. An extra offset current has also been applied to eliminate the effects of the mismatch in CP. The chip is fabricated with CSMC 0.5μm DPTM CMOS technology. Experiments show that it achieves THD≤0.08% and SNR≤ 82dB,and the maximum outband emission energy ≤ 90dBc/Hz. Furthermore,it also uses an auto frequency adjusting method to avoid tuning up the external inductances. All these merits are very suitable for FM transmission.展开更多
The state-space representation of linear time-invariant (LTI) fractional order systems is introduced, and a proof of their stability theory is also given. Then an efficient identification algorithm is proposed for tho...The state-space representation of linear time-invariant (LTI) fractional order systems is introduced, and a proof of their stability theory is also given. Then an efficient identification algorithm is proposed for those fractional order systems. The basic idea of the algorithm is to compute fractional derivatives and the filter simultaneously, i.e., the filtered fractional derivatives can be obtained by computing them in one step, and then system identification can be fulfilled by the least square method. The instrumental variable method is also used in the identification of fractional order systems. In this way, even if there is colored noise in the systems, the unbiased estimation of the parameters can still be obtained. Finally an example of identifying a viscoelastic system is given to show the effectiveness of the aforementioned method.展开更多
A windowed very small aperture laser (VSAL) source for use in high resolution near field optical data storage is fabricated.The windowed regions are introduced to avoid shorting the pn junction with metal coating a...A windowed very small aperture laser (VSAL) source for use in high resolution near field optical data storage is fabricated.The windowed regions are introduced to avoid shorting the pn junction with metal coating and suppress the COD effect.It facilitates producing VSAL by simplified technology and improves the laser performance.A VSAL with 400nm small aperture is demonstrated by focused ion beam (FIB) and the output power is 0 3mW at 31mA.展开更多
In this paper performances of wavelet transform domain (WTD) adaptive equalizers based on the least mean￣square (LMS) algorithm are analyzed. The optimum Wiener solution, the condition of convergence, the minimum ...In this paper performances of wavelet transform domain (WTD) adaptive equalizers based on the least mean￣square (LMS) algorithm are analyzed. The optimum Wiener solution, the condition of convergence, the minimum mean square error (MSE) and the steady state excess MSE of the WTD adaptive equalizer are obtained. Constant and time varying convergence factor adaptive algorithms are studied respectively. Computational complexities of WTD LMS equalizers are given. The equalizer in WTD shows much better convergence performance than that of the conventional in time domain.展开更多
Based on the minimum settling time （MST） theory and step-response analysis of the second order system in active switched capacitor （SC） networks, a novel clock feedthrough frequency compensation （CFFC） method fo...Based on the minimum settling time （MST） theory and step-response analysis of the second order system in active switched capacitor （SC） networks, a novel clock feedthrough frequency compensation （CFFC） method for a folded-cascode OTA is proposed. The damping factor r/is adjusted by using MOS capacitors to introduce clock feedthrough so that the OTA can obtain the MST state and thus achieve fast settling. Research results indicate that the settling time of the compensated OTA is reduced by 22.7% ;as the capacitor load varies from 0.5 to 2.5pF,the improved settling time increases approximately linearly from 3.62 to 4.46ns： for VGA application, fast settling can also be achieved by modifying the MOS capacitor value accordingly when the closed loop gain of the compensated OTA varies.展开更多
文摘A small-signal equivalent circuit model and the ted. The equivalent lumped circuit, which takes the main extraction techniques for photodetector chips are presen- factors that limit a photodetector＇s RF performance into consideration,is first determined based on the device＇s physical structure. The photodetector＇s S parameters are then on-wafer measured, and the measured raw data are processed with further calibration. A genetic algorithm is used to fit the measured data, thereby allowing us to calculate each parameter value of the model. Experimental resuits show that the modeled parameters are well matched to the measurements in a frequency range from 130MHz to 20GHz, and the proposed method is proved feasible. This model can give an exact description of the photodetector chip＇s high frequency performance,which enables an effective circuit-level prediction for photodetector and optoelectronic integrated circuits.
文摘This paper introduces a novel digital transceiver for the cordless telephone zero （CT0） standard,which uses a digital modulation and demodulation technique to handle the signal instead of the traditional analog meth-od. In the transmitter,a fractional-N phase locked loop （PLL） is utilized to realize the continuous phase frequency shift key （CPFSK） modulation,and a 2 Ts raised cosine （2RC） shaping technique is used to reduce the occupied bandwidth. In the receiver,a novel digital method is proposed to demodulate the 2RC CPFSK signal. This chip is fabricated using an SMIC 0.35μm mixed signal CMOS process with a die size of 2mm × 2mm. With an external low noise amplifier （LNA）,the sensitivity of the chip is better than -103dBm.
基金Supported by the National Natural Science Foundation of China(50576033)the Aeronautical ScienceFoundation of China(04C52019)~~
文摘A simple and effective mechanism is proposed to realize the parsimoniousness of the online least squares support vector regression （LS-SVR）, and the approach is called the OPLS-SVR for short. Hence, the response time is curtailed. Besides, an OPLS-SVR based analytical redundancy technique is presented to cope with the sensor failure and drift problems to guarantee that the provided signals for the aeroengine controller are correct and acceptable. Experiments on the sensor failure and drift show the effectiveness and the validity of the proposed analytical redundancy.
文摘A new FM transmitter is reported. It adopts a fractional-N PLL synthesizer to realize the FM modulator. An extra offset current has also been applied to eliminate the effects of the mismatch in CP. The chip is fabricated with CSMC 0.5μm DPTM CMOS technology. Experiments show that it achieves THD≤0.08% and SNR≤ 82dB,and the maximum outband emission energy ≤ 90dBc/Hz. Furthermore,it also uses an auto frequency adjusting method to avoid tuning up the external inductances. All these merits are very suitable for FM transmission.
文摘The state-space representation of linear time-invariant (LTI) fractional order systems is introduced, and a proof of their stability theory is also given. Then an efficient identification algorithm is proposed for those fractional order systems. The basic idea of the algorithm is to compute fractional derivatives and the filter simultaneously, i.e., the filtered fractional derivatives can be obtained by computing them in one step, and then system identification can be fulfilled by the least square method. The instrumental variable method is also used in the identification of fractional order systems. In this way, even if there is colored noise in the systems, the unbiased estimation of the parameters can still be obtained. Finally an example of identifying a viscoelastic system is given to show the effectiveness of the aforementioned method.
文摘A windowed very small aperture laser (VSAL) source for use in high resolution near field optical data storage is fabricated.The windowed regions are introduced to avoid shorting the pn junction with metal coating and suppress the COD effect.It facilitates producing VSAL by simplified technology and improves the laser performance.A VSAL with 400nm small aperture is demonstrated by focused ion beam (FIB) and the output power is 0 3mW at 31mA.
文摘In this paper performances of wavelet transform domain (WTD) adaptive equalizers based on the least mean￣square (LMS) algorithm are analyzed. The optimum Wiener solution, the condition of convergence, the minimum mean square error (MSE) and the steady state excess MSE of the WTD adaptive equalizer are obtained. Constant and time varying convergence factor adaptive algorithms are studied respectively. Computational complexities of WTD LMS equalizers are given. The equalizer in WTD shows much better convergence performance than that of the conventional in time domain.
文摘Based on the minimum settling time （MST） theory and step-response analysis of the second order system in active switched capacitor （SC） networks, a novel clock feedthrough frequency compensation （CFFC） method for a folded-cascode OTA is proposed. The damping factor r/is adjusted by using MOS capacitors to introduce clock feedthrough so that the OTA can obtain the MST state and thus achieve fast settling. Research results indicate that the settling time of the compensated OTA is reduced by 22.7% ;as the capacitor load varies from 0.5 to 2.5pF,the improved settling time increases approximately linearly from 3.62 to 4.46ns： for VGA application, fast settling can also be achieved by modifying the MOS capacitor value accordingly when the closed loop gain of the compensated OTA varies.
