This paper presents a new encryption embedded processor aimed at the application requirement of wireless sensor network （WSN）. The new encryption embedded processor not only offers Rivest Shamir Adlemen （RSA）, Adv...This paper presents a new encryption embedded processor aimed at the application requirement of wireless sensor network （WSN）. The new encryption embedded processor not only offers Rivest Shamir Adlemen （RSA）, Advanced Encryption Standard （AES）, 3 Data Encryption Standard （3 DES） and Secure Hash Algorithm 1 （SHA - 1 ） security engines, but also involves a new memory encryption scheme. The new memory encryption scheme is implemented by a memory encryption cache （MEC）, which protects the confidentiality of the memory by AES encryption. The experi- ments show that the new secure design only causes 1.9% additional delay on the critical path and cuts 25.7% power consumption when the processor writes data back. The new processor balances the performance overhead, the power consumption and the security and fully meets the wireless sensor environment requirement. After physical design, the new encryption embedded processor has been successfully tape-out.展开更多
The design, manufacture and deployment of embedded systems become increasingly complex and multidisciplinary process. Before the steps of manufacturing and deployment, a simulation and validation phase is necessary. I...The design, manufacture and deployment of embedded systems become increasingly complex and multidisciplinary process. Before the steps of manufacturing and deployment, a simulation and validation phase is necessary. In this paper, a WSN （wireless sensors network） emulator, implemented on a FPGA, is described by： describing some models as examples, how multiple simulations can be done when the device was configured and programmed once, and how results from the behavioral emulator can be extracted. The diversity of applications and the typically scarce node resources set very tight constraints to WSN. It is not possible to fulfill all requirements with a general purpose WSN, for which reason the rapid development of application specific WSNs is preferred. A new emulator for the design, simulation, and evaluation of WSNs, implemented on a very dense FPGA （field programmable gate arrays）, is presented, exploring the parallelism and his resources to do a very rapid simulation ofa WSN for long periods, and without overloading memory by the intermediate data.展开更多
文摘This paper presents a new encryption embedded processor aimed at the application requirement of wireless sensor network （WSN）. The new encryption embedded processor not only offers Rivest Shamir Adlemen （RSA）, Advanced Encryption Standard （AES）, 3 Data Encryption Standard （3 DES） and Secure Hash Algorithm 1 （SHA - 1 ） security engines, but also involves a new memory encryption scheme. The new memory encryption scheme is implemented by a memory encryption cache （MEC）, which protects the confidentiality of the memory by AES encryption. The experi- ments show that the new secure design only causes 1.9% additional delay on the critical path and cuts 25.7% power consumption when the processor writes data back. The new processor balances the performance overhead, the power consumption and the security and fully meets the wireless sensor environment requirement. After physical design, the new encryption embedded processor has been successfully tape-out.
文摘The design, manufacture and deployment of embedded systems become increasingly complex and multidisciplinary process. Before the steps of manufacturing and deployment, a simulation and validation phase is necessary. In this paper, a WSN （wireless sensors network） emulator, implemented on a FPGA, is described by： describing some models as examples, how multiple simulations can be done when the device was configured and programmed once, and how results from the behavioral emulator can be extracted. The diversity of applications and the typically scarce node resources set very tight constraints to WSN. It is not possible to fulfill all requirements with a general purpose WSN, for which reason the rapid development of application specific WSNs is preferred. A new emulator for the design, simulation, and evaluation of WSNs, implemented on a very dense FPGA （field programmable gate arrays）, is presented, exploring the parallelism and his resources to do a very rapid simulation ofa WSN for long periods, and without overloading memory by the intermediate data.
